FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection
Currently, FPGA (Field Programmable Gate Array) technology is being widely used for accelerator control owing to its fast digital processing capability. This paper is purely a model to determine the design circuit to implement Partial Discharge (PD) detection in FPGA technology. The research shall i...
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my.uniten.dspace-57272017-12-14T04:15:41Z FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection Emilliano Chakrabarty, C.K. Basri, A. Ramasamy, A.K. Ping, L.C. Currently, FPGA (Field Programmable Gate Array) technology is being widely used for accelerator control owing to its fast digital processing capability. This paper is purely a model to determine the design circuit to implement Partial Discharge (PD) detection in FPGA technology. The research shall involve ISE Simulator version 9.2i (Xilinx) and Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA) for the detection and counting of partial discharge signals in underground cable. The impulse signals at the input data have very fast rise time in the range of 1 ns to 2 ns. 2017-12-08T06:45:44Z 2017-12-08T06:45:44Z 2010 Article https://www.scopus.com/record/display.uri?eid=2-s2.0-84865150970&origin=resultslist&sort=plf-f&src=s&sid=7d06adada125e669615f834570c5ec3d&sot en_US Internetworking Indonesia JournalOpen Access Volume 2, Issue 1, March 2010, Pages 29-37 |
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Currently, FPGA (Field Programmable Gate Array) technology is being widely used for accelerator control owing to its fast digital processing capability. This paper is purely a model to determine the design circuit to implement Partial Discharge (PD) detection in FPGA technology. The research shall involve ISE Simulator version 9.2i (Xilinx) and Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA) for the detection and counting of partial discharge signals in underground cable. The impulse signals at the input data have very fast rise time in the range of 1 ns to 2 ns. |
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Emilliano Chakrabarty, C.K. Basri, A. Ramasamy, A.K. Ping, L.C. |
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Emilliano Chakrabarty, C.K. Basri, A. Ramasamy, A.K. Ping, L.C. FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection |
author_facet |
Emilliano Chakrabarty, C.K. Basri, A. Ramasamy, A.K. Ping, L.C. |
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Emilliano |
title |
FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection |
title_short |
FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection |
title_full |
FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection |
title_fullStr |
FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection |
title_full_unstemmed |
FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection |
title_sort |
fpga simulation of ad converter by using giga hertz speed data acquisition for partial discharge detection |
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2017 |
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1644493759804604416 |
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