Analyze and optimize the silicide thickness in 45nm CMOS technology using Taguchi method
Taguchi method was used to analyze the experimental data in order to get the optimum average of silicide thickness in 45nm devices. The virtually fabrication of the devices was performed by using ATHENA module. While the electrical characterization of the devices was implemented by using ATLAS modul...
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| Main Authors: | , , , |
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| Format: | Conference Proceeding |
| Published: |
2017
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| Online Access: | http://dspace.uniten.edu.my:80/jspui/handle/123456789/5249 |
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