Cobalt silicide and titanium silicide effects on nano devices

• Main Authors: Elgomati H.A., Majlis B.Y., Salehuddin F., Ahmad I., Zaharim A., Hamid F.A.
• Other Authors: 36536722700
• Format: Conference Paper
• Published: 2023
• Subjects: cobalt silicide; nanometer; NMOS; Silicide; titanium silicide; Aluminum; Annealing; Carbon dioxide; CMOS integrated circuits; Cobalt; Cobalt compounds; Electric contactors; Electric properties; Electron mobility; Metals; Ohmic contacts; Polysilicon; Titanium; Titanium nitride; Tungsten; Wire; Aluminum wires; Anneal temperatures; Annealing process; CMOS devices; Cobalt layers; Cobalt salicide; Cobalt silicide; Different effects; Electrical characterization; Fabrication process; Gate structure; Growth process; High resistivity; High temperature; Metal silicide; N2 ambient; Nano device; Non-existence; Polysilicon gates; Salicides; Silicide surfaces; Silicon substrates; Silvaco; Thin tin; Silicides

This paper describes growth process of the two silicide Sub-nanometer devices and the different effects of having cobalt silicide and titanium silicide on a Sub-nanometer CMOS devices. On the top of CMOS device gate, metal silicide is developed on-top of the polysilicon to produce an ohmic contact between the polysilicon and aluminum wire. The ohmic contact should be better compared to metal-polysilicon borders. This silicide has been widely used to reduce resistance of polysilicon gates. Metal silicides such as titanium silicide (TiSi 2), tungsten salicide (WSi 2), cobalt salicide (CoSi 2) andnickel salicide (NiSi 2) are widely used for this purpose. These metals react with polysilicon, to form metal silicide layer that possesses better physical and electrical properties to interface with aluminium. The silicide need to be optimally annealed in order to obtain a good ratio of metal silicide to silicon in the gate structure Titanium silicide is formed by depositing PVD Ti on silicon substrates followed by annealing process. Anneals were carried out in an N2 ambient and resulted in a thin TiN layer on the silicide surface. For cobalt cilicide, a CVD cobalt layer was deposited on-top silicon at 450C, and after annealing the structure, Co 2Si phase was formed. And at 800C the high resistivity CoSi phase formed. As we continued to increase the anneal temperature to 950C, CoSi 2 layer is formed. The high temperature required to form a silicide and the non existence of the Co 2Si phase are attributed to the oxide at the interface. It is found that cobalt silicide grew faster and deeper to the silicon, thus saving a lot of time and cost. The succeding experiments also show that cobalt silicide has better electrical properties such as sheet resistance, capacitance and electron mobility. The transistor fabrication process was simulated by using Silvaco ATHENA module and the resulting electrical characterization was simulated using ATLAS module. � 2011 IEEE.