Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling
Hafnium oxides; High-k dielectric; Manufacture; Silicides; Taguchi methods; CMOS transistors; HIGH-K metal gates; Modeling and optimization; Process parameters; Process parameters optimizations; Titanium silicide; Tungsten silicide; Wafer fabrications; Reconfigurable hardware
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EDP Sciences
2023
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my.uniten.dspace-226352023-05-29T14:11:25Z Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling Noor Faizah Z.A. Ahmad I. Ker P.J. Siti Munirah Y. Mohd Firdaus R. Md Fazle E. Menon P.S. 56395444600 12792216600 37461740800 57191675888 58140788300 57191665557 57201289731 Hafnium oxides; High-k dielectric; Manufacture; Silicides; Taguchi methods; CMOS transistors; HIGH-K metal gates; Modeling and optimization; Process parameters; Process parameters optimizations; Titanium silicide; Tungsten silicide; Wafer fabrications; Reconfigurable hardware This paper presents the modeling and optimization of 14nm gate length CMOS transistor which is down-scaled from previous 32nm gate length. High-k metal gate material was used in this research utilizing Hafnium Dioxide (HfO2) as dielectric and Tungsten Silicide (WSi2) and Titanium Silicide (TiSi2) as a metal gate for NMOS and PMOS respectively. The devices are fabricated virtually using ATHENA module and characterized its performance evaluation via ATLAS module; both in Virtual Wafer Fabrication (VWF) of Silvaco TCAD Tools. The devices were then optimized through a process parameters variability using L9 Taguchi Method. There were four process parameter with two noise factor of different values were used to analyze the factor effect. The results show that the optimal value for both transistors are well within ITRS 2013 prediction where VTH and IOFF are 0.236737V and 6.995705nA/um for NMOS device and 0.248635 V and 5.26nA/um for PMOS device respectively. � 2016 The Authors, published by EDP Sciences. Final 2023-05-29T06:11:25Z 2023-05-29T06:11:25Z 2016 Conference Paper 10.1051/matecconf/20167801017 2-s2.0-84992437009 https://www.scopus.com/inward/record.uri?eid=2-s2.0-84992437009&doi=10.1051%2fmatecconf%2f20167801017&partnerID=40&md5=76523956eec5c8c7705426a6d949e14b https://irepository.uniten.edu.my/handle/123456789/22635 78 1017 All Open Access, Gold, Green EDP Sciences Scopus |
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| description |
Hafnium oxides; High-k dielectric; Manufacture; Silicides; Taguchi methods; CMOS transistors; HIGH-K metal gates; Modeling and optimization; Process parameters; Process parameters optimizations; Titanium silicide; Tungsten silicide; Wafer fabrications; Reconfigurable hardware |
| author2 |
56395444600 |
| author_facet |
56395444600 Noor Faizah Z.A. Ahmad I. Ker P.J. Siti Munirah Y. Mohd Firdaus R. Md Fazle E. Menon P.S. |
| format |
Conference Paper |
| author |
Noor Faizah Z.A. Ahmad I. Ker P.J. Siti Munirah Y. Mohd Firdaus R. Md Fazle E. Menon P.S. |
| spellingShingle |
Noor Faizah Z.A. Ahmad I. Ker P.J. Siti Munirah Y. Mohd Firdaus R. Md Fazle E. Menon P.S. Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling |
| author_sort |
Noor Faizah Z.A. |
| title |
Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling |
| title_short |
Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling |
| title_full |
Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling |
| title_fullStr |
Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling |
| title_full_unstemmed |
Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling |
| title_sort |
process parameters optimization of 14nm mosfet using 2-d analytical modelling |
| publisher |
EDP Sciences |
| publishDate |
2023 |
| _version_ |
1806426170881736704 |
| score |
13.214268 |