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Performance of CMOS Schmitt Trigger

This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results hav...

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Main Authors: Rohana, Sapawi, Chee, R.L.S, Siti Kudnie, Sahari, Norhuzaimin, Julai
Format: E-Article
Language:English
Published: IEEE 2008
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://ir.unimas.my/id/eprint/16596/1/Performance%20of%20CMOS%20Schmitt%20Trigger%28abstract%29.pdf
http://ir.unimas.my/id/eprint/16596/
http://ieeexplore.ieee.org/document/4580818/
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spelling my.unimas.ir.165962017-06-12T05:51:40Z http://ir.unimas.my/id/eprint/16596/ Performance of CMOS Schmitt Trigger Rohana, Sapawi Chee, R.L.S Siti Kudnie, Sahari Norhuzaimin, Julai TK Electrical engineering. Electronics Nuclear engineering This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results have been carried out based on Microwind software on three different designs in term of propagation delay, Energy-delay Product and hystheresis. From the result, the proposed full swing CMOS Schmitt Trigger was able to operate as low voltage (0.8V-1.5V). IEEE 2008 E-Article PeerReviewed text en http://ir.unimas.my/id/eprint/16596/1/Performance%20of%20CMOS%20Schmitt%20Trigger%28abstract%29.pdf Rohana, Sapawi and Chee, R.L.S and Siti Kudnie, Sahari and Norhuzaimin, Julai (2008) Performance of CMOS Schmitt Trigger. International Conference on Computer and Communication Engineering, 2008. ICCCE 2008. ISSN ISBN: 978-1-4244-1691-2 http://ieeexplore.ieee.org/document/4580818/ 10.1109/ICCCE.2008.4580818
institution Universiti Malaysia Sarawak
building Centre for Academic Information Services (CAIS)
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Sarawak
content_source UNIMAS Institutional Repository
url_provider http://ir.unimas.my/
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Rohana, Sapawi
Chee, R.L.S
Siti Kudnie, Sahari
Norhuzaimin, Julai
Performance of CMOS Schmitt Trigger
description This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results have been carried out based on Microwind software on three different designs in term of propagation delay, Energy-delay Product and hystheresis. From the result, the proposed full swing CMOS Schmitt Trigger was able to operate as low voltage (0.8V-1.5V).
format E-Article
author Rohana, Sapawi
Chee, R.L.S
Siti Kudnie, Sahari
Norhuzaimin, Julai
author_facet Rohana, Sapawi
Chee, R.L.S
Siti Kudnie, Sahari
Norhuzaimin, Julai
author_sort Rohana, Sapawi
title Performance of CMOS Schmitt Trigger
title_short Performance of CMOS Schmitt Trigger
title_full Performance of CMOS Schmitt Trigger
title_fullStr Performance of CMOS Schmitt Trigger
title_full_unstemmed Performance of CMOS Schmitt Trigger
title_sort performance of cmos schmitt trigger
publisher IEEE
publishDate 2008
url http://ir.unimas.my/id/eprint/16596/1/Performance%20of%20CMOS%20Schmitt%20Trigger%28abstract%29.pdf
http://ir.unimas.my/id/eprint/16596/
http://ieeexplore.ieee.org/document/4580818/
_version_ 1644512409863323648
score 13.15806

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