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The memory-less method of generating multiplicative inverse values for S-box in AES algorithm

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Bibliographic Details
Main Authors: Siti Zarina, Md Naziri, Norina, Idris
Other Authors: sitizarina@unimap.edu.my
Format: Working Paper
Language:English
Published: Institute of Electrical and Electronics Engineering (IEEE) 2009
Subjects:
AES algorithm
Antilog and log values
Galois finite field GF(28
Memory-less
Multiplicative inverse
Substitution box
Field programmable gate arrays
Cryptography
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/7395
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spelling my.unimap-73952009-12-10T04:17:41Z The memory-less method of generating multiplicative inverse values for S-box in AES algorithm Siti Zarina, Md Naziri Norina, Idris sitizarina@unimap.edu.my AES algorithm Antilog and log values Galois finite field GF(28 Memory-less Multiplicative inverse Substitution box Field programmable gate arrays Cryptography Link to publisher's homepage at http://ieeexplore.ieee.org The substitution box (S-box) component is the heart of the Advanced Encryption Standard (AES) algorithm. The S-box values are generated from the multiplicative inverse of Galois finite field GF(28) with an affine transform. There are many techniques of gaining the multiplicative inverse values were proposed. Most of the hardware implementations of S-box were using look-up tables (LUTs) (memory-based) to store the values which employ the largest area in design. In this paper, a software method of producing the multiplicative inverse values, which is the generator of S-box values and the possibilities of implementing the methods in hardware applications will be discussed. The method is using the log and antilog values. The method is modified to create a memory-less value generator in AES hardware-based implementation. The implementation is proposed to embed on limited memory, small-sized FPGA. 2009-12-10T04:17:41Z 2009-12-10T04:17:41Z 2008-12-01 Working Paper p.1-5 978-1-4244-2315-6 http://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4786771 http://hdl.handle.net/123456789/7395 en Proceedings of the International Conference on Electronic Design (ICED 2008) Institute of Electrical and Electronics Engineering (IEEE)
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic AES algorithm
Antilog and log values
Galois finite field GF(28
Memory-less
Multiplicative inverse
Substitution box
Field programmable gate arrays
Cryptography
spellingShingle AES algorithm
Antilog and log values
Galois finite field GF(28
Memory-less
Multiplicative inverse
Substitution box
Field programmable gate arrays
Cryptography
Siti Zarina, Md Naziri
Norina, Idris
The memory-less method of generating multiplicative inverse values for S-box in AES algorithm
description Link to publisher's homepage at http://ieeexplore.ieee.org
author2 sitizarina@unimap.edu.my
author_facet sitizarina@unimap.edu.my
Siti Zarina, Md Naziri
Norina, Idris
format Working Paper
author Siti Zarina, Md Naziri
Norina, Idris
author_sort Siti Zarina, Md Naziri
title The memory-less method of generating multiplicative inverse values for S-box in AES algorithm
title_short The memory-less method of generating multiplicative inverse values for S-box in AES algorithm
title_full The memory-less method of generating multiplicative inverse values for S-box in AES algorithm
title_fullStr The memory-less method of generating multiplicative inverse values for S-box in AES algorithm
title_full_unstemmed The memory-less method of generating multiplicative inverse values for S-box in AES algorithm
title_sort memory-less method of generating multiplicative inverse values for s-box in aes algorithm
publisher Institute of Electrical and Electronics Engineering (IEEE)
publishDate 2009
url http://dspace.unimap.edu.my/xmlui/handle/123456789/7395
_version_ 1643788802940993536
score 13.214268

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