Description: A genetic algorithm approach to VLSI macro cell non-slicing floorplans using binary tree

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Bibliographic Details
Main Authors:	Hasliza, A. Rahim@Samsuddin, Ab Rahman, A. A H, Andaljayalakshmi, G., R. Badlishah, Ahmad, Wan Nur Suryani Firuz, Wan Ariffin
Format:	Article
Language:	English
Published:	Institute of Electrical and Electronics Engineering (IEEE) 2009
Subjects:	Very large scale integrated (VLSI) Integrated circuit layout Integrated logic circuits Genetic algorithms Trees (mathematics) Integrated circuits > Design and construction Integrated circuits
Online Access:	http://dspace.unimap.edu.my/xmlui/handle/123456789/6894
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