UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime
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my.unimap-344092014-05-12T03:41:25Z UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime Mohd Khairuddin, Md. Arshad Makovejev, Sergej Olsen, Sarah H. Andrieu, F. Raskin, Jean Pierre Flandre, Denis Kilchytska, Valeriya I. mohd.khairuddin@unimap.edu.my Analog figures of merit Asymmetrical double gate Link to publisher's homepage at http://www.elsevier.com/ In this work we investigate the effect of ground plane (GP) on analog figures of merit (FoM) of ultra-thin body and thin buried oxide (UTBB) SOI MOSFETs. Based on experimental devices, both n- and p-type GP configurations are considered and compared with standard no-GP substrates. In a standard single-gate (SG) regime, the effect of GP implementation on analog FoM (related to slightly higher body factor and improved gate-to-channel coupling) is negligible. Moreover, p-GP implementation allows higher intrinsic gain at high frequency compared with no-GP and n-GP substrates. Furthermore, we demonstrate that application of an asymmetric double-gate (ADG) (i.e. front-gate to back-gate/substrate connection) regime allows better control of short-channel effects in terms of drain induced barrier lowering, subthreshold slope and threshold voltage control, due to improved gate(s)-to-channel coupling. Application of an ADG mode is shown to enhance analog FoM such as transconductance, drive current and intrinsic gain of UTBB SOI MOSFETs. Finally, simulations predict that improvements of analog FoM provided by ADG mode can be obtained in the whole dynamic operation range. Moreover, ADG mode provides elimination of the high-frequency substrate coupling effects. 2014-05-12T03:41:25Z 2014-05-12T03:41:25Z 2013 Article Solid-State Electronics, vol. 90, 2013, pages 56-64 0038-1101 http://www.sciencedirect.com/science/article/pii/S0038110113001123 http://dspace.unimap.edu.my:80/dspace/handle/123456789/34409 en Elsevier Ltd. |
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Analog figures of merit Asymmetrical double gate |
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Analog figures of merit Asymmetrical double gate Mohd Khairuddin, Md. Arshad Makovejev, Sergej Olsen, Sarah H. Andrieu, F. Raskin, Jean Pierre Flandre, Denis Kilchytska, Valeriya I. UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime |
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Link to publisher's homepage at http://www.elsevier.com/ |
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mohd.khairuddin@unimap.edu.my |
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mohd.khairuddin@unimap.edu.my Mohd Khairuddin, Md. Arshad Makovejev, Sergej Olsen, Sarah H. Andrieu, F. Raskin, Jean Pierre Flandre, Denis Kilchytska, Valeriya I. |
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Article |
author |
Mohd Khairuddin, Md. Arshad Makovejev, Sergej Olsen, Sarah H. Andrieu, F. Raskin, Jean Pierre Flandre, Denis Kilchytska, Valeriya I. |
author_sort |
Mohd Khairuddin, Md. Arshad |
title |
UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime |
title_short |
UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime |
title_full |
UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime |
title_fullStr |
UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime |
title_full_unstemmed |
UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime |
title_sort |
utbb soi mosfets analog figures of merit: effects of ground plane and asymmetric double-gate regime |
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Elsevier Ltd. |
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2014 |
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http://dspace.unimap.edu.my:80/dspace/handle/123456789/34409 |
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1643797481095430144 |
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13.222552 |