Design and implementation of fail -recover operation for embedded system based FPGA

International Postgraduate Conference On Engineering (IPCE 2010), 16th - 17th October 2010 organized by Centre for Graduate Studies, Universiti Malaysia Perlis (UniMAP) at School of Mechatronic Engineering, Pauh Putra Campus, Arau, Perlis, Malaysia.

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Main Authors: M. Sabri, Salim, R. Badlishah, Ahmad, Prof. Madya Dr., M. F., Melka
Other Authors: muhsabri1967@yahoo.com
Format: Working Paper
Language:English
Published: Universiti Malaysia Perlis (UniMAP) 2012
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Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/21220
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spelling my.unimap-212202012-10-05T03:32:47Z Design and implementation of fail -recover operation for embedded system based FPGA M. Sabri, Salim R. Badlishah, Ahmad, Prof. Madya Dr. M. F., Melka muhsabri1967@yahoo.com Field programmable gate array (FPGA) Fail-Recover Operation unit (FROU ) Embedded system International Postgraduate Conference On Engineering (IPCE 2010), 16th - 17th October 2010 organized by Centre for Graduate Studies, Universiti Malaysia Perlis (UniMAP) at School of Mechatronic Engineering, Pauh Putra Campus, Arau, Perlis, Malaysia. High speed digital systems are often applied in critical tasks or in environments where a failure can result in unacceptable malfunctions or in dangerous situations for people. This proposal presented Fail-Recover Operation unit (FROU ) design which it overcomes all the drawbacks of watchdog and fault-tolerant using an on-the-fly acquisition technique for capturing relevant system information, without adding any overhead and being completely transparent to the controlled system. The development of the system software and hardware will be totally separated from the presence of the WDP, thus dramatically simplifying the design process. All these features are easily obtained with a field programmable gate array (FPGA) implementation of the Fail Operation Recovery, so enabling a fast and straightforward design flow, reduced circuital complexity, ability to modification the design and a gain of several additional advantages. 2012-10-05T03:32:47Z 2012-10-05T03:32:47Z 2010-10-16 Working Paper 978-967-5760-03-7 http://hdl.handle.net/123456789/21220 en Proceedings of the International Postgraduate Conference on Engineering (IPCE 2010) Universiti Malaysia Perlis (UniMAP) Centre for Graduate Studies
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Field programmable gate array (FPGA)
Fail-Recover Operation unit (FROU )
Embedded system
spellingShingle Field programmable gate array (FPGA)
Fail-Recover Operation unit (FROU )
Embedded system
M. Sabri, Salim
R. Badlishah, Ahmad, Prof. Madya Dr.
M. F., Melka
Design and implementation of fail -recover operation for embedded system based FPGA
description International Postgraduate Conference On Engineering (IPCE 2010), 16th - 17th October 2010 organized by Centre for Graduate Studies, Universiti Malaysia Perlis (UniMAP) at School of Mechatronic Engineering, Pauh Putra Campus, Arau, Perlis, Malaysia.
author2 muhsabri1967@yahoo.com
author_facet muhsabri1967@yahoo.com
M. Sabri, Salim
R. Badlishah, Ahmad, Prof. Madya Dr.
M. F., Melka
format Working Paper
author M. Sabri, Salim
R. Badlishah, Ahmad, Prof. Madya Dr.
M. F., Melka
author_sort M. Sabri, Salim
title Design and implementation of fail -recover operation for embedded system based FPGA
title_short Design and implementation of fail -recover operation for embedded system based FPGA
title_full Design and implementation of fail -recover operation for embedded system based FPGA
title_fullStr Design and implementation of fail -recover operation for embedded system based FPGA
title_full_unstemmed Design and implementation of fail -recover operation for embedded system based FPGA
title_sort design and implementation of fail -recover operation for embedded system based fpga
publisher Universiti Malaysia Perlis (UniMAP)
publishDate 2012
url http://dspace.unimap.edu.my/xmlui/handle/123456789/21220
_version_ 1643793309658775552
score 13.214268