High-k gate dielectric nano-FET leakage current analysis

• Main Authors: Bunseng, Chan, Charlie Soh, Kang, Eng Siew, Hui, Seng Kheong, Lim, Wei Jer, Ismail Saad, Nurmin Bolong
• Format: Proceedings
• Language: English; English
• Published: Institute of Electrical and Electronics Engineers 2021
• Subjects: TA1-2040 Engineering (General). Civil engineering (General); TK1-9971 Electrical engineering. Electronics. Nuclear engineering
• Online Access: https://eprints.ums.edu.my/id/eprint/32713/2/High-k%20gate%20dielectric%20nano-FET%20leakage%20current%20analysis.ABSTRACT.pdf; https://eprints.ums.edu.my/id/eprint/32713/1/High-k%20Gate%20Dielectric%20Nano-FET%20Leakage%20Current%20Analysis.pdf; https://eprints.ums.edu.my/id/eprint/32713/; https://ieeexplore.ieee.org/document/9652730

This paper reveals the use of high-k dielectric material to mitigate the subthreshold leakage current. The feature size of conventional MOSFET using SiO2 has approached their physical limits where the oxide thickness should not reach below 2nm due to high leakage current and the tunnelling increase drastically. Therefore, it is difficult to scale down the size of the MOSFET meanwhile improve its performance. Instead of reducing the size of the transistor, it can make the changes to the parameter, such as the channel length, oxide thickness, and channel width. However, these may affect the performance of the device. Hence, the replacement of SiO2 with other high-k dielectric material has been analyzed. The material used in the analysis including SiO2, Al2O3, HfO2, Ta2O5, and La2O3. The characteristic of subthreshold leakage current was tested through simulation using MATLAB. La2O3 as dielectric material shows a good refinement on mitigating the subthreshold leakage current by 87% compared to SiO2.