A 23.3 dBm CMOS power amplifier with third-order gm cancellation linearization technique achieving OIP3 of 34 dBm

Purpose The purpose of this paper is to implement a highly linear 180 nm complementary metal oxide semiconductor (CMOS) power amplifier (PA) to meet the stringent linearity requirement of an long term evolution (LTE) signal with minimum trade-off to power added efficiency (PAE). Design/methodology/a...

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Bibliographic Details
Main Authors: Mariappan, Selvakumar, Rajendran, Jagadheswaran, Mohd Noh, Norlaili, Yusof, Yusman, Aridas, Narendra Kumar
Format: Article
Published: 2022
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Online Access:http://eprints.um.edu.my/42465/
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