7L-SCBI topology with minimal semiconductor device count
In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boos...
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my.um.eprints.316592022-10-18T04:54:40Z http://eprints.um.edu.my/31659/ 7L-SCBI topology with minimal semiconductor device count Reddy, Bhimireddy Prathap Siddique, Marif Daula Iqbal, Atif Mekhilef, Saad Rahman, Syed Maroti, Pandav Kiran TA Engineering (General). Civil engineering (General) In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype. Wiley 2020-11-04 Article PeerReviewed Reddy, Bhimireddy Prathap and Siddique, Marif Daula and Iqbal, Atif and Mekhilef, Saad and Rahman, Syed and Maroti, Pandav Kiran (2020) 7L-SCBI topology with minimal semiconductor device count. IET Power Electronics, 13 (14). pp. 3199-3203. ISSN 1755-4535, DOI https://doi.org/10.1049/iet-pel.2020.0313 <https://doi.org/10.1049/iet-pel.2020.0313>. 10.1049/iet-pel.2020.0313 |
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TA Engineering (General). Civil engineering (General) Reddy, Bhimireddy Prathap Siddique, Marif Daula Iqbal, Atif Mekhilef, Saad Rahman, Syed Maroti, Pandav Kiran 7L-SCBI topology with minimal semiconductor device count |
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In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype. |
format |
Article |
author |
Reddy, Bhimireddy Prathap Siddique, Marif Daula Iqbal, Atif Mekhilef, Saad Rahman, Syed Maroti, Pandav Kiran |
author_facet |
Reddy, Bhimireddy Prathap Siddique, Marif Daula Iqbal, Atif Mekhilef, Saad Rahman, Syed Maroti, Pandav Kiran |
author_sort |
Reddy, Bhimireddy Prathap |
title |
7L-SCBI topology with minimal semiconductor device count |
title_short |
7L-SCBI topology with minimal semiconductor device count |
title_full |
7L-SCBI topology with minimal semiconductor device count |
title_fullStr |
7L-SCBI topology with minimal semiconductor device count |
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7L-SCBI topology with minimal semiconductor device count |
title_sort |
7l-scbi topology with minimal semiconductor device count |
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Wiley |
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2020 |
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http://eprints.um.edu.my/31659/ |
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1748181063519174656 |
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13.160551 |