Signal Integrity Analysis for High Speed Digital Circuit

• Main Author: Shang, Erica Ting Mei
• Format: Final Year Project
• Language: English
• Published: 2009
• Online Access: http://utpedia.utp.edu.my/3262/1/0001.pdf; http://utpedia.utp.edu.my/3262/

This dissertation report marks the commencement of the Final Year Project (FYP) titled Signal Integrity Analysis for High Speed Digital Circuit. This project is a study on various signal integrity (SI) issues that could possibly come into play on Printed Circuit Boards (PCBs). This project is conducted to analyze and grasp a better understanding on the nature of the problem, how the problem is manifested in circuits and what design solutions can be employed to minimize its effects. Such a study is not something new but is definitely getting more crucial as the vast improvement in chip fabrication technology leads to logic families operating at a much higher speed, resulting to a faster rise time which will worsen the noise phenomena, i. e. reflection, crosstalk, and power system stability during component switching. Several causes to signal integrity issues on the printed circuit boards are analyzed and both proper and improper circuit design techniques are implemented on the Advanced Design System (ADS) software for data collection and analysis. Deliverables at the end this project would be the simulation results to support the study, whereby several simulations are conducted to demonstrate and verify the theoretical study of signal integrity issues. Besides that, the designs will then be fabricated on a two-layer microstrip board and tested on the Digital Communication Analyzer (DCA) to obtain more practical results. A project Gantt chart is attached in the appendix to illustrate the work flow and anticipated progress.