Two-Stage Interface Circuit Design for a 32-Color Resolution Optical Sensor

• Main Authors: Israel , Yohannes, Bermak, Amine
• Format: Citation Index Journal
• Published: 2013
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utp.edu.my/8999/1/stamp.jsp_tp%3D%26arnumber%3D6329923%26tag%3D1; http://eprints.utp.edu.my/8999/

An interface circuit design for an optical sensor based on a two-stage cascaded architecture is presented in this paper. The proposed design is a mixed signal solution that provides few advantages in terms of speed, power consumption, higher resolution with smaller number of storage units, and small area for future on-chip integration. Simulation and experimental results for five bits resolution (32 levels) are presented to validate the design. We are aiming for a single-chip integrated solution; however, for a quick proof of concept, the proposed design has been implemented as a PCB using discrete off-the-shelf components. The biasing current and power consumption from the PCB implementation are 192 mA and 1.3 W, respectively, at a 6.75-V supply voltage.