Implementing WCDMA Digital Up Converter In FPGA
This paper will discuss the design and implementation of the digital up converter (DUC) in Field Programmable Gate Array (FPGA). DUC is a digital circuit which generating digital intermediate frequency (IF) signal from low complex digital baseband signal. The DUC provides pulse shaping, interp...
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| Format: | Conference or Workshop Item |
| Published: |
2008
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| Subjects: | |
| Online Access: | http://eprints.utp.edu.my/6272/1/IEEE_2008_int_RF_n_MW_2_FPGA.pdf http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4897372 http://eprints.utp.edu.my/6272/ |
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| Summary: | This paper will discuss the design and
implementation of the digital up converter (DUC) in
Field Programmable Gate Array (FPGA). DUC is a
digital circuit which generating digital intermediate
frequency (IF) signal from low complex digital
baseband signal. The DUC provides pulse shaping,
interpolation and frequency translation where the upsampled
signal is shifted from centered frequency
(0Hz) to intermediate frequency. Due to Wideband
Code Division Multiple Access (WCDMA)
specifications, the DUC is to pulse shaped and up
sampled the baseband signal by a factor of 16. The
DUC up sampled the signal up to 61.44MHz. |
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