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Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC

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Main Authors: Sajjad, M., Yusoff, M.B.Z., Ahmed, M.
Format: Conference or Workshop Item
Published: Institute of Electrical and Electronics Engineers Inc. 2020
Online Access:https://www.scopus.com/inward/record.uri?eid=2-s2.0-85096951763&doi=10.1109%2fiCCECE49321.2020.9231146&partnerID=40&md5=5dc31a82b33fecfff5b58fb43873ab43
http://eprints.utp.edu.my/24528/
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spelling my.utp.eprints.245282021-08-27T05:15:12Z Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC Sajjad, M. Yusoff, M.B.Z. Ahmed, M. Institute of Electrical and Electronics Engineers Inc. 2020 Conference or Workshop Item NonPeerReviewed https://www.scopus.com/inward/record.uri?eid=2-s2.0-85096951763&doi=10.1109%2fiCCECE49321.2020.9231146&partnerID=40&md5=5dc31a82b33fecfff5b58fb43873ab43 Sajjad, M. and Yusoff, M.B.Z. and Ahmed, M. (2020) Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC. In: UNSPECIFIED. http://eprints.utp.edu.my/24528/
institution Universiti Teknologi Petronas
building UTP Resource Centre
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Petronas
content_source UTP Institutional Repository
url_provider http://eprints.utp.edu.my/
format Conference or Workshop Item
author Sajjad, M.
Yusoff, M.B.Z.
Ahmed, M.
spellingShingle Sajjad, M.
Yusoff, M.B.Z.
Ahmed, M.
Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC
author_facet Sajjad, M.
Yusoff, M.B.Z.
Ahmed, M.
author_sort Sajjad, M.
title Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC
title_short Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC
title_full Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC
title_fullStr Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC
title_full_unstemmed Design of Double-Precision Fully-Programmable Computational Unit for FPGA and ASIC
title_sort design of double-precision fully-programmable computational unit for fpga and asic
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2020
url https://www.scopus.com/inward/record.uri?eid=2-s2.0-85096951763&doi=10.1109%2fiCCECE49321.2020.9231146&partnerID=40&md5=5dc31a82b33fecfff5b58fb43873ab43
http://eprints.utp.edu.my/24528/
_version_ 1738656603056373760
score 13.160551

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