Test vectors reductoin for integrated circuit testing using horizontal hamming distance

• Main Author: Alamgir, Arbab
• Format: Thesis
• Language: English
• Published: 2016
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/77590/1/ArbabAlamgirMFKE2016.pdf; http://eprints.utm.my/id/eprint/77590/; http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:94131

In testing digital combinational logic for stuck-at faults, it is required to determine the most appropriate test sequence needed to detect the required number of possible faults. The exhaustive test pattern generation method is the simplest approach to implement as it produces test patterns consist...