Fault location and isolation in micro-grids using a digital central protection unit

• Main Authors: Mirsaeidi, Sohrab, Mat Said, Dalila, Mustafa, Mohammad Wazir, Habibuddin, Mohammad Hafiz, Ghaffari, Kimia
• Format: Article
• Published: Elsevier Ltd 2016
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/72738/; https://www.scopus.com/inward/record.uri?eid=2-s2.0-84949793379&doi=10.1016%2fj.rser.2015.10.162&partnerID=40&md5=103fa9b1f906accf6d2bc117ddc0a431

Currently, there are significant interests in deployment of renewable and low carbon energy sources in the form of micro-grids for local energy generation. Micro-grids operate in two modes, namely stand-alone and grid-connected. This poses a problem in micro-grid protection settings, in a sense that the fault current magnitude in a micro-grid reduces drastically during its transition from being grid-connected to stand-alone mode of operation. This paper presents a micro-grid protection scheme based on positive-sequence component using PMUs and a digital CPU. The salient feature of the proposed scheme in comparison with the previous works is that it has the ability to protect both radial and looped micro-grids against different types of faults with the capability of single-phase tripping. Furthermore, since the CPU is capable of updating its pickup values (upstream and downstream equivalent positive-sequence impedances of each line) after the first change in the micro-grid configuration (such as transferring from grid-connected to islanded mode and or disconnection of a line, bus, or DER either in grid-connected mode or in islanded mode), it can protect micro-grid against subsequent faults. Finally, in order to verify the effectiveness of the suggested scheme and the CPU, several simulations have been undertaken by using DIgSILENT PowerFactory and MATLAB software packages.