ASIC design of natural frequency of ECG signal for atrial fibrillation detection module using high-level synthesis approach
The growth of interest in the development of reduced-scale electrocardiogram (ECG) system based on field-programmable gated-array (FPGA) design platform is increasing. This study provides initial result of mapping digital signal processing to hardware design for specific purpose. In this paper, a pa...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Penerbit UTM Press
2015
|
| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/57897/1/NurulAshikinAbdulKadir2015_ASICDesignofNaturalFrequencyofECG.pdf http://eprints.utm.my/id/eprint/57897/ http://dx.doi/org/10.11113/jt.v74.4673 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | The growth of interest in the development of reduced-scale electrocardiogram (ECG) system based on field-programmable gated-array (FPGA) design platform is increasing. This study provides initial result of mapping digital signal processing to hardware design for specific purpose. In this paper, a part of digital signal processing for atrial fibrillation classification was implemented to register-transfer level (RTL) design. The specific part was feature extraction of ECG signal. The algorithm of ECG signal feature extraction was natural frequency from second-order system for detecting atrial fibrillation. By applying high-level synthesis method, three designs were implemented for natural frequency behavior. The designs were two Single-Cycle (Design 1 and Design 2) and Multi-Cycle fully-constraint (Design 3), of which logic utilization consist of 2530, 36 and 1, respectively. Performance evaluation among all designs were compared. |
|---|