Fault modeling of chirality variation for carbon nanotube field effect transistor and its effect on circuits performance

• Main Author: Othman, Mohammad Faizi
• Format: Thesis
• Language: English
• Published: 2015
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/54609/1/MohammadFaiziOthmanMFKE2015.pdf; http://eprints.utm.my/id/eprint/54609/; http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:86035

Carbon Nanotube (CNT) is one of the promising materials to be discovered that can replace silicon as the material for nano scale electrical switch. CNTFET have been shown to have better performance, able to operate on shorter channel length and drive a lower power envelop as it MOSFET counterpart. The conductivity of CNT is determined by the chirality of the tube, which determines the diameter of the CNT. However, the chirality cannot be fully controlled directly during manufacturing of the material. Much efforts have been concentrated to have tight manufacturing control to have constant chirality. The effect of chirality variation is in the diameter of the CNT tube which is responsible for the current carrying capacity of the CNT. Non-uniform chirality will cause degradation in performance of logic circuits. The variation in chirality can be viewed as faults. For that reason, there is a crucial need to model defects introduced during manufacturing process. Current defect models are purely based on simple resistors to mimic stuck at 0 and stuck at 1 which does not answer the basic question which is: “what is the optimum process control should be that so that even with variations in chirality, the circuit could still function? ”. The objective of this project is first, to model the defect of CNT based on current manufacturing issues, so that designers and manufacturer could simply predict the behavior of logic circuit. Second, is to analyze logic circuit function with variations in chirality. Based on this result, a simple model is produced. The research methodology adopted in this project is analyzing the effect of changes in chirality and model it as a simple resistor in series with the fault free circuit. The work is based on simulation using HSPICE and the CNT is from Stanford CNT model. The result indicates that circuits could still function despite some changes in chirality which means manufacture still has some acceptable margin of errors.