A closed loop control based power manager for WiNoC architectures

In modern CMOS technologies, the integration density continues to increase while limitations due to the wires interconnect become a bottleneck especially in multi-hop intra-chip communications. Emerging architectures, such as Wireless Networks-on-Chip (Wi- NoC), represent the candidate solutions to...

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Main Authors: Rusli, Mohd. Shahrizal, Mineo, Andrea, Palesi, Maurizio, Ascia, Giuseppe, Catania, Vincenzo, Marsono, Muhammad Nadzir
Format: Article
Published: Association for Computing Machinery 2014
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Online Access:http://eprints.utm.my/id/eprint/51442/
http://dx.doi.org/10.1145/2613908.2613914
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spelling my.utm.514422019-01-28T04:30:37Z http://eprints.utm.my/id/eprint/51442/ A closed loop control based power manager for WiNoC architectures Rusli, Mohd. Shahrizal Mineo, Andrea Palesi, Maurizio Ascia, Giuseppe Catania, Vincenzo Marsono, Muhammad Nadzir TK Electrical engineering. Electronics Nuclear engineering In modern CMOS technologies, the integration density continues to increase while limitations due to the wires interconnect become a bottleneck especially in multi-hop intra-chip communications. Emerging architectures, such as Wireless Networks-on-Chip (Wi- NoC), represent the candidate solutions to deal with communication latency issues which affect the many-core architectures. In WiNoC, metallic wires are replaced with long-range radio interconnections. Unfortunately, the energy consumed by the RF transceiver (i.e., the main building block of aWiNoC), and in particular by its transmitter, accounts for a significant fraction of the overall communication energy. Current WiNoC proposals use the same transmitting power for each transmitter regardless the physical location of the receiver antenna. This paper proposes a closed loop control mechanism that, based on the bit error rate observed by the receivers, selectively reconfigures the transmitters by calibrating their transmitting power. Preliminary results show the effectiveness of the proposed technique which allows to save up to 40% of energy with less than 2% of performance degradation. Association for Computing Machinery 2014-05 Article PeerReviewed Rusli, Mohd. Shahrizal and Mineo, Andrea and Palesi, Maurizio and Ascia, Giuseppe and Catania, Vincenzo and Marsono, Muhammad Nadzir (2014) A closed loop control based power manager for WiNoC architectures. ACM International Conference Proceeding Series . pp. 60-63. ISSN 1556-276X http://dx.doi.org/10.1145/2613908.2613914 DOI: 10.1145/2613908.2613914
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Rusli, Mohd. Shahrizal
Mineo, Andrea
Palesi, Maurizio
Ascia, Giuseppe
Catania, Vincenzo
Marsono, Muhammad Nadzir
A closed loop control based power manager for WiNoC architectures
description In modern CMOS technologies, the integration density continues to increase while limitations due to the wires interconnect become a bottleneck especially in multi-hop intra-chip communications. Emerging architectures, such as Wireless Networks-on-Chip (Wi- NoC), represent the candidate solutions to deal with communication latency issues which affect the many-core architectures. In WiNoC, metallic wires are replaced with long-range radio interconnections. Unfortunately, the energy consumed by the RF transceiver (i.e., the main building block of aWiNoC), and in particular by its transmitter, accounts for a significant fraction of the overall communication energy. Current WiNoC proposals use the same transmitting power for each transmitter regardless the physical location of the receiver antenna. This paper proposes a closed loop control mechanism that, based on the bit error rate observed by the receivers, selectively reconfigures the transmitters by calibrating their transmitting power. Preliminary results show the effectiveness of the proposed technique which allows to save up to 40% of energy with less than 2% of performance degradation.
format Article
author Rusli, Mohd. Shahrizal
Mineo, Andrea
Palesi, Maurizio
Ascia, Giuseppe
Catania, Vincenzo
Marsono, Muhammad Nadzir
author_facet Rusli, Mohd. Shahrizal
Mineo, Andrea
Palesi, Maurizio
Ascia, Giuseppe
Catania, Vincenzo
Marsono, Muhammad Nadzir
author_sort Rusli, Mohd. Shahrizal
title A closed loop control based power manager for WiNoC architectures
title_short A closed loop control based power manager for WiNoC architectures
title_full A closed loop control based power manager for WiNoC architectures
title_fullStr A closed loop control based power manager for WiNoC architectures
title_full_unstemmed A closed loop control based power manager for WiNoC architectures
title_sort closed loop control based power manager for winoc architectures
publisher Association for Computing Machinery
publishDate 2014
url http://eprints.utm.my/id/eprint/51442/
http://dx.doi.org/10.1145/2613908.2613914
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score 13.160551