Field programmable gate array implementation for fault detection in a power transmission lines
The aim of this thesis is to design an FPGA implementation for faults detection in power transmission lines. A prototype of DE2 board training kit with Cyclone IIEP2C35F672C6 FPGA processor is used to perform the analysis and obtain experiment results. Failure to protect the electrical power system...
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Main Author: | Peh, Kok Guan |
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Format: | Thesis |
Published: |
2010
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Subjects: | |
Online Access: | http://eprints.utm.my/id/eprint/26743/ http://libraryopac.utm.my/client/en_AU/main/search/results?qu=Field+programmable+gate+array+implementation+for+fault+detection+in+a+power+transmission+lines&te= |
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