A hardware architecture of prewitt edge detection

• Main Author: Seif, Aramesh
• Format: Thesis
• Language: English
• Published: 2009
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/18328/1/ArameshSeifMFKE2009.pdf; http://eprints.utm.my/id/eprint/18328/

The objective of this project is to develop a real-time hardware architecture for Prewitt edge detection algorithm. Prewitt edge detection provides differencing operation in the single kernel. Verilog hardware description language was used as the hardware programming language for a real-time edge detection system. The architecture is capable of operating with a clock frequency of 145 MHz at 550 frames per second. Computation error analysis performed shows that the proposed architecture produces outputs similar to that obtained by software simulation using Matlab.