Symmetric and asymmetric multilevel inverter topologies with reduced number of switching devices structure for high power density achievement

This study presents a proposed symmetric and asymmetric multilevel inverter topologies using reduced number of switching devices (RNSD) structure for high power density achievement. Principally, asymmetric multilevel inverter (AMLI) topology is able to produce higher output voltage level without mod...

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Bibliographic Details
Main Author: Yatim, Mohd Hafizie
Format: Thesis
Language:English
English
English
Published: 2019
Subjects:
Online Access:http://eprints.uthm.edu.my/566/1/24p%20MOHD%20HAFIZIE%20YATIM.pdf
http://eprints.uthm.edu.my/566/2/MOHD%20HAFIZIE%20YATIM%20COPYRIGHT%20DECLARATION.pdf
http://eprints.uthm.edu.my/566/3/MOHD%20HAFIZIE%20YATIM%20WATERMARK.pdf
http://eprints.uthm.edu.my/566/
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Summary:This study presents a proposed symmetric and asymmetric multilevel inverter topologies using reduced number of switching devices (RNSD) structure for high power density achievement. Principally, asymmetric multilevel inverter (AMLI) topology is able to produce higher output voltage level without modification of the structure in order to reduce total harmonic distortion (THD). In contrast, the number of switching devices need to be increased in symmetric multilevel inverter (SMLI) topology and cascaded H-bridge (CHB) structure when higher output voltage level is considered. A 5-level RNSD structure is proposed as a circuit configuration for symmetric (5-level) and asymmetric (7-level and 9-level) multilevel inverters (MLIs). For switching strategies, modified pulse width modulation (MPWM), sinusoidal pulse width modulation (SPWM), modified pulse width modulation with reduced angle (MPWM-RA) and modified pulse width with low frequency triangular (MPWM-LFT) are selected to produce output voltage levels of the proposed structure. Theoretically, THD is reduced drastically when the number of output voltage level is increased and the MPWM-LFT is considered in this study. The results show that the voltage THD of the 7-level MLI is 21.6% with MPWM and 18.3% with SPWM. Meanwhile, with MPWM-RA, the voltage THD of the 7-level MLI is 12.2% while 11.6% with MPWM-LFT. In fact, with MPWM-RA and MPWM-LFT, the THDs are lower than with SPWM due to the optimum angle at the output voltage level considered. Therefore, the 7 and 9 levels AMLI shows the lowest THD, which are 11.6% and 9% respectively when MPWM-LFT and RNSD structures are considered. LC passive filter is considered in order to follow the IEEE Std 519-1992 using SPWM and shows that the THD of the 7-level AMLI is the lowest at 0.8% in simulation while 4.4% for experimental results. The comparison results based on the Pareto-Front method demonstrated that the proposed 7-level AMLI structure is able to achieve high efficiency at 98.52% and high power density of 4.46 kW/dm3 at 75 kHz as compared to the 7-level CHB structure even though the switching frequency changes from 2 kHz to 500 kHz.