Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology

• Main Author: Abdullah, Farisal
• Format: Thesis
• Language: English; English; English
• Published: 2013
• Subjects: TK Electrical engineering. Electronics Nuclear engineering; TK7800-8360 Electronics
• Online Access: http://eprints.uthm.edu.my/1902/1/24p%20FARISAL%20ABDULLAH.pdf; http://eprints.uthm.edu.my/1902/2/FARISAL%20ABDULLAH%20COPYRIGHT%20DECLARATION.pdf; http://eprints.uthm.edu.my/1902/3/FARISAL%20ABDULLAH%20WATERMARK.pdf; http://eprints.uthm.edu.my/1902/

This research presents failure analysis (FA) works on gate oxide defect of Bi�polar CMOS Diffuse (BCD) technology. The latent problem with electrical degradation in the CMOS performance is due to gate oxide defect. The defect was well known affects the CMOS reliability after certain period of time, temperatures and stress. The FA techniques used for this research were developed using a combination of IDDQ scan test pattern, photo localization by the emission microscope and Field Emission Scanning Electron Microscopy (FE-SEM) for defect inspection. The FA methods successfully evaluated on few failing samples which were taken from customer return with IDDQ failure range from 50µA until less than 1mA. Concurrently, the spotted excessive emission found on the defective samples during photo localization step indicates of gate oxide defect. The defect well observed with FE-SEM analysis on all tested samples after the physical analysis accomplishment until oxide layer. The proposed technique shows an effective method to compensate the existing FA difficulty on gate oxide defect faced by IC manufacturer in micrometer and nanometer scale technology, which having more metal interconnection layers with higher dense. The proposed technique able to construct promising result compared to the conventional techniques which used in the current FA practice due to certain extends of limitation.