THREE BIT SUBTRACTION CIRCUIT VIA FIELD PROGRAMMABLE

• Main Authors: Jaafar, Anuar, ARASID, NOORAISYAH, Hashim, Nik Mohd Zarifie, Abdul Latiff, anas, Abdul Rahim, Hazli Rafis
• Format: Article
• Language: English
• Published: International Journal for Advance Research in Engineering and Technology 2013
• Subjects: QA75 Electronic computers. Computer science
• Online Access: http://eprints.utem.edu.my/id/eprint/9950/1/Three_Bit_Subtraction_Circuit.pdf; http://eprints.utem.edu.my/id/eprint/9950/; http://www.ijaret.org/Three%20Bit%20Subtraction%20Circuit.pdf

This project is about to design the software and hardware simulator for a Three Bit subtraction Circuit via Field Programmable Gate Array (FPGA). The three bit subtraction circuits are involved in performing the subtraction for each bit by performs operation the arithmetic and logic uni...