Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation
In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improv...
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my.utem.eprints.241082020-06-19T12:01:11Z http://eprints.utem.edu.my/id/eprint/24108/ Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation A Subki, A Shamsul Rahimi Mohd Tumari, Mohd Zaidi Abd Rashid, Wan Norhisyam Jidin, Aiman Zakwan Muhammad Mustafa, Ahmad Nizamuddin T Technology (General) TK Electrical engineering. Electronics Nuclear engineering In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%. Institute Of Advanced Engineering And Science (IAES) 2019-06 Article PeerReviewed text en http://eprints.utem.edu.my/id/eprint/24108/2/17423-35538-1-PB.pdf A Subki, A Shamsul Rahimi and Mohd Tumari, Mohd Zaidi and Abd Rashid, Wan Norhisyam and Jidin, Aiman Zakwan and Muhammad Mustafa, Ahmad Nizamuddin (2019) Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation. International Journal Of Power Electronics And Drive System (IJPEDS), 10 (2). pp. 625-635. ISSN 2088-8694 http://ijpeds.iaescore.com/index.php/IJPEDS/article/view/17423 |
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T Technology (General) TK Electrical engineering. Electronics Nuclear engineering A Subki, A Shamsul Rahimi Mohd Tumari, Mohd Zaidi Abd Rashid, Wan Norhisyam Jidin, Aiman Zakwan Muhammad Mustafa, Ahmad Nizamuddin Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation |
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In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter
consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass
filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%. |
format |
Article |
author |
A Subki, A Shamsul Rahimi Mohd Tumari, Mohd Zaidi Abd Rashid, Wan Norhisyam Jidin, Aiman Zakwan Muhammad Mustafa, Ahmad Nizamuddin |
author_facet |
A Subki, A Shamsul Rahimi Mohd Tumari, Mohd Zaidi Abd Rashid, Wan Norhisyam Jidin, Aiman Zakwan Muhammad Mustafa, Ahmad Nizamuddin |
author_sort |
A Subki, A Shamsul Rahimi |
title |
Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation |
title_short |
Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation |
title_full |
Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation |
title_fullStr |
Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation |
title_full_unstemmed |
Hardware Implementation Of Single Phase Three-Level Cascaded H-Bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation |
title_sort |
hardware implementation of single phase three-level cascaded h-bridge multilevel inverter using sinusoidal pulse width modulation |
publisher |
Institute Of Advanced Engineering And Science (IAES) |
publishDate |
2019 |
url |
http://eprints.utem.edu.my/id/eprint/24108/2/17423-35538-1-PB.pdf http://eprints.utem.edu.my/id/eprint/24108/ http://ijpeds.iaescore.com/index.php/IJPEDS/article/view/17423 |
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