Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers

• Main Author: Mohammed Napiah, Zul Atfyi Fauzan
• Format: Thesis
• Language: English
• Published: 2017
• Subjects: T Technology (General); TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utem.edu.my/id/eprint/19045/1/Characterization%20And%20Optimization%20Of%20Avalanche%20Photodiodes%20Fabricated%20By%20Standard%20CMOS%20Process%20For%20High-Speed%20Photoreceivers.pdf; http://eprints.utem.edu.my/id/eprint/19045/; https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=102930

A dissertation presented on the characterization and optimization of avalanche photodiodes fabricated by standard CMOS process (CMOS-APD) for high-speed photoreceivers, beginning with the theory and principle related to photodetector and avalanche photodiodes, followed by characterization,optimization, and wavelength dependence of CMOS-APD, and finally link up with the transimpedance amplifier. nMOS-type and pMOS-type silicon avalanche photodiodes were fabricated by standard 0.18 μm CMOS process, and the currentvoltage characteristic and the frequency response of the CMOS-APDs with and without the guard ring structure were measured. CMOS-APDs have features of high avalanche gain below 10 V, wide bandwidth over 5 GHz, and easy integration with electronic circuits. In CMOS-APDs, guard ring structure is introduced for high-speed operation with the role of elimination the slow photo generated carriers in a deep layer and a substrate. The bandwidth of the CMOS-APD is enhanced with the guard ring structure at a sacrifice of the responsivity. Based on comparison of nMOS-type and pMOS-type APDs, the nMOS-type APD is more suitable for high-speed operation. The bandwidth is enhanced with decreasing the spacing of interdigital electrodes due to decreased carrier transit time and with decreasing the detection area and the PAD size for RF probing due to decreased device capacitance. Thus, an nMOS-type APD with the electrode spacing of 0.84 μm, the detection area of 10 x 10 μm², the PAD size for RF probing of 30 x 30 μm² along with the guard ring structure was fabricated. As a results, the maximum bandwidth of 8.4 GHz at the avalanche gain of about 10 and the gain-bandwidth product of 280 GHz were achieved. Furthermore, the wavelength dependence of the responsivity and the bandwidth of the CMOS-APDs with and without the guard ring structure also revealed. At a wavelength of 520 nm or less, there is no difference in the responsivity and the frequency response because all the illuminated light is absorbed in the p+-layer and the Nwell due to strong light absorption of Si. On the other hand, a part of the incident light is absorbed in the Psubstrate and the photo-generated carriers in the P-substrate are eliminated by the guard ring structure for the wavelength longer than 520 nm, and then bandwidth was remarkably enhanced at the sacrifice of the responsivity. In addition, to achieve high-speed photoreceivers, two types of TIA which are common-source and regulated-cascode TIAs were simulated by utilizing the output of the CMOSAPDs.The figure of merits of gain-bandwidth product was used to find the ideal results of the transimpedance gain and bandwidth performance due to trade-offs between both of them. The common-source TIA produced the transimpedance gain of 22.17 dBΩ, the bandwidth of 21.21 GHz and the gain-bandwidth product of 470.23 THz × dBΩ. Besides that, the simulated results of the regulated-cascade TIA configuration demonstrate 79.45 dBΩ transimpedance gain, 10.64 GHz bandwidth, and 845.35 THz × dBΩ gain-bandwidth product. Both of these TIA results meet the target of this research and further encouraging this successful CMOS-APDs to realize high-speed photoreceivers.