Design Of Low-Noise Amplifier Utilising Active Shunt Feedback For Medradio Band Applications

• Main Author: Abdul Mubin, Mutanizam
• Format: Thesis
• Language: English
• Published: 2019
• Subjects: T Technology; TK Electrical Engineering. Electronics. Nuclear Engineering
• Online Access: http://eprints.usm.my/56151/1/Design%20Of%20Low-Noise%20Amplifier%20Utilising%20Active%20Shunt%20Feedback%20For%20Medradio%20Band%20Applications_Mutanizam%20Abdul%20Mubin.pdf; http://eprints.usm.my/56151/

A low-power 0.18-µm CMOS low-noise amplifier (LNA) for MedRadio applications has been designed and verified in this research work. Cadence IC5 software with Silterra’s C18G CMOS Process Design Kit were used for all design and simulation work. This LNA utilises complementary common-source current-reuse topology and subthreshold biasing to achieve low-power operation with simultaneous high gain and low noise figure. An active shunt feedback circuit is used as input matching network to provide a suitable input return loss. For test and measurement purpose, an output buffer was designed and integrated with this LNA. Inductorless design approach of this LNA, together with the use of MOSCAPs as capacitors, help to minimise the die size. On post-layout simulations with simulated total power consumption of 0.5 mW, all targeted specifications are met albeit with some degradations from the pre-layout simulation results. From pre-layout to post-layout simulations, the simulated gain and input return loss are reduced to 16.3 dB and 10.1 dB respectively whilst the simulated noise figure worsens to 4.9 dB. However, the simulated IP1dB and IIP3 slightly improve to -26.7 dBm and -18.6 dBm respectively. Overall, the post-layout simulated performance of this proposed LNA is fairly comparable to some current state-of-the-art LNAs for MedRadio applications. However, the worsening simulated input return loss and noise figure at post-layout level due to parasitic capacitances and resistances in the integrated circuit layout need to be given serious attention. This is because the post-layout simulation results of these two parameters virtually have no margin to their respective targeted specifications.