Partial Binary Tree Network (PBTN)- A New Dynamic Element Matching (DEM) approach for Digital Analog Converter (DAC)

• Main Author: William, Yeap Keat Seong
• Format: Monograph
• Language: English
• Published: Universiti Sains Malaysia 2017
• Subjects: T Technology; TK Electrical Engineering. Electronics. Nuclear Engineering
• Online Access: http://eprints.usm.my/53065/1/Partial%20Binary%20Tree%20Network%20%28PBTN%29-%20A%20New%20Dynamic%20Element%20Matching%20%28DEM%29%20approach%20for%20Digital%20Analog%20Converter%20%28DAC%29_William%20Yeap%20Keat%20Seong_E3_2017.pdf; http://eprints.usm.my/53065/

Digital-to-analog converters (DACs) are essential operations in numerous digital systems which demands high performance data converters. With shrinking supply voltage, budget constraints of test times, and rising bandwidth requirement causing DAC architectures highly relying on matched components to perform data conversions. However, matched components are nearly impossible to manufacture, there will always be mismatch errors which causes discrepancies between the desired value and designed value. A popular method to minimize component mismatch error is Dynamic Element Matching (DEM). This technique is a randomization technique to select one of the appropriate codes for each of the digital input value before entering the DAC block. Using this technique, the time averages of the equivalent components at each of the component positions are equal or nearly equal to reduce the effects of component mismatches in electronic circuits. The drawback of existing designs is that the design would suffer from excessive hardware complexity. A complicated encoding is usually necessary for conventional DEM encoders which will lead to a lot of switch transitions at the same time and it will cause glitches to the output signal. This paper reports the simulation results of 6-bit 1-MSB PBTN with DNL of 0.00001895 LSB, INL of 0.0001457 LSB, power consumption of 104.7mW; 6-bit 1-MSB PBTN with DNL of -0.00928 LSB, INL of 0.008669 LSB, power consumption of 103.8mW; 8-bit 1-MSB with DNL of -0.00028287 LSB, INL of 0.000252 LSB, power consumption of 115.4mW; and 8-bit 2-MSB with DNL of 0.001324 LSB, INL of 0.0007896 LSB, power consumption of 114.5mW.