Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate
The rapid development of wireless communication has led to the need for high-speed electronic device. The current integrated complementary metal oxide semiconductor (CMOS) suffer from high energy losses and this factor can be eliminated using high resistivity silicon substrate. However, the drawback...
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Universiti Sains Malaysia
2017
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my.usm.eprints.53027 http://eprints.usm.my/53027/ Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate Wong, Soo Theng T Technology TK Electrical Engineering. Electronics. Nuclear Engineering The rapid development of wireless communication has led to the need for high-speed electronic device. The current integrated complementary metal oxide semiconductor (CMOS) suffer from high energy losses and this factor can be eliminated using high resistivity silicon substrate. However, the drawback of using high resistivity silicon substrate is the presence of free carrier charges at oxide-silicon interface due to the parasitic surface conduction. Though deep level doping compensation using gold has shown a potential of suppressing the parasitic surface conduction effect and providing a high resistivity to the silicon substrate, there are no solid evidence to support this method. Thus, the goal of this project is to quantify the potential of Au-compensated high resistivity silicon substrate in suppressing the parasitic surface conduction. The attenuation losses of the Coplanar Waveguide Transmission Line on the substrate is firstly measured using the extracted S-parameter data. The figure of merit technique using effective resistivity characterisation is then used to analyse and quantify the capability of the substrate. The outcomes of the numerical analysis had shown a constant value of effective resistivity for Au-compensated high resistivity silicon substrate thus justifying the potential of Au-compensated high resistivity silicon substrate in suppressing the parasitic surface conduction as it shows bias-independent results when bias voltage is applied to the device. Universiti Sains Malaysia 2017-06-01 Monograph NonPeerReviewed application/pdf en http://eprints.usm.my/53027/1/Effective%20Resistivity%20Analysis%20Using%20Cpw%20Transmission%20Line%20Model%20For%20Au-Compensated%20High%20Resistivity%20Silicon%20Substrate_Wong%20Soo%20Theng_E3_2017.pdf Wong, Soo Theng (2017) Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate. Project Report. Universiti Sains Malaysia, Pusat Pengajian Kejuruteraan Elektrik & Elektronik. (Submitted) |
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T Technology TK Electrical Engineering. Electronics. Nuclear Engineering Wong, Soo Theng Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate |
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The rapid development of wireless communication has led to the need for high-speed electronic device. The current integrated complementary metal oxide semiconductor (CMOS) suffer from high energy losses and this factor can be eliminated using high resistivity silicon substrate. However, the drawback of using high resistivity silicon substrate is the presence of free carrier charges at oxide-silicon interface due to the parasitic surface conduction. Though deep level doping compensation using gold has shown a potential of suppressing the parasitic surface conduction effect and providing a high resistivity to the silicon substrate, there are no solid evidence to support this method. Thus, the goal of this project is to quantify the potential of Au-compensated high resistivity silicon substrate in suppressing the parasitic surface conduction. The attenuation losses of the Coplanar Waveguide Transmission Line on the substrate is firstly measured using the extracted S-parameter data. The figure of merit technique using effective resistivity characterisation is then used to analyse and quantify the capability of the substrate. The outcomes of the numerical analysis had shown a constant value of effective resistivity for Au-compensated high resistivity silicon substrate thus justifying the potential of Au-compensated high resistivity silicon substrate in suppressing the parasitic surface conduction as it shows bias-independent results when bias voltage is applied to the device. |
format |
Monograph |
author |
Wong, Soo Theng |
author_facet |
Wong, Soo Theng |
author_sort |
Wong, Soo Theng |
title |
Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate |
title_short |
Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate |
title_full |
Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate |
title_fullStr |
Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate |
title_full_unstemmed |
Effective Resistivity Analysis Using Cpw Transmission Line Model For Au-Compensated High Resistivity Silicon Substrate |
title_sort |
effective resistivity analysis using cpw transmission line model for au-compensated high resistivity silicon substrate |
publisher |
Universiti Sains Malaysia |
publishDate |
2017 |
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http://eprints.usm.my/53027/1/Effective%20Resistivity%20Analysis%20Using%20Cpw%20Transmission%20Line%20Model%20For%20Au-Compensated%20High%20Resistivity%20Silicon%20Substrate_Wong%20Soo%20Theng_E3_2017.pdf http://eprints.usm.my/53027/ |
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