Analog Design Implementation Of Usb2.0 On-The-Go Attach Detection Protocol

• Main Author: Chia, Chong Lun
• Format: Thesis
• Language: English
• Published: 2013
• Subjects: TK1-9971 Electrical engineering. Electronics. Nuclear engineering
• Online Access: http://eprints.usm.my/46073/1/Chia%20Chong%20Lun24.pdf; http://eprints.usm.my/46073/

As the technology advancement, mobile phone or hand-held devices nowadays are equipped with extra features which accelerate the power consumption. Hence, battery life span is becoming a huge concern to all consumers. Recently, many efforts have been made to reduce power consumption as well as increase battery life span, USB2.0 On-the-Go is part of them. However, besides technical specification, there is no circuit implementation being published to date. Furthermore, with current architecture available in Intel, it has limitation on supporting high capacitance devices such as, Embedded Host. To solve the above problem, new circuitries is being proposed and designed under 45 nm CMOS process technology with 1.8 V standard power supply. The functionality of the circuits are being modeled and simulated by using SPICE simulator. Analysis are done by observing the transient simulation result as the ADP is more concerned on the charging voltage level and charging time. The proposed design is further verified by reliability test which simulates the circuit with PVT variations. The PVT conditions are ±10% variation on 1.8 V typical power supply, temperature ranges from -40℃ to 110℃ and 13 different process skews. It can be observed that the new proposed circuitries met the functionality which is described by the USB organization. Besides, the performance of the proposed circuitry is reasonably good under the above PVT variation. With such a huge PVT variation, current source is still able to meet the specification given, which is 1.1 mA to 1.65 mA. Hence, it can be concluded that the proposed design of ADP front-end circuitry met both functionality and reliability requirements.