Very Large Scale Integration Cell Based Path Extractor For Physical To Layout Mapping In Fault Isolation Work

Debug and diagnosis in post-silicon challenges the technological advancement in Physical-to-Layout Mapping capabilities. Areas that require such innovation are fault isolation work in failure analysis of semiconductor devices, at post-silicon stage. Since fault isolation work begins at Register Tran...

Full description

Saved in:
Bibliographic Details
Main Author: Pragasam, Matthew
Format: Thesis
Language:English
Published: 2017
Subjects:
Online Access:http://eprints.usm.my/39594/1/MATTHEW_PRAGASAM_24_Pages.pdf
http://eprints.usm.my/39594/
Tags: Add Tag
No Tags, Be the first to tag this record!