A 14-Bit Pseudo-Differential Current-Source Resistor-String Hybrid Digital-To-Analogue (DAC) Converter With Low Power Consumption

• Main Author: Chang, Hui Yi
• Format: Thesis
• Language: English
• Published: 2017
• Subjects: TK1-9971 Electrical engineering. Electronics. Nuclear engineering
• Online Access: http://eprints.usm.my/38352/1/CHANG_HUI_YI_24_Pages.pdf; http://eprints.usm.my/38352/

A 14-bit Hybrid DAC circuit is created with the goal of being low power yet maintaining high resolution output and high accuracy. In order to achieve this, binary weighted DAC architecture is used for the 10 LSBs and thermometer coding is used for the 4 MSBs to leverage the advantages of both architectures. Binary Weighted architecture is used due to its simplicity and high linearity but it is too expensive and impractical for higher resolutions. Thermometer coding advantage lie in having very low glitch effect thus improving the monotonicity of the design. Furthermore, this design uses a switchable current source to drive the digital input. The switchable current source is used to manipulate the current gain to ensure a low power design. The design is using predictive technology model (PTM) 45nm 1.1V CMOS technology. It is being simulated using LTSpice software. Simulation Results show a fine resolution step value of 44 μV and a requirement of only 12 μA current supply which results in a very low power consumption of around 23mW. This is superior to all similar works except for binary-weighted current steering DAC which consumes 20mW yet suffers from serious glitch issues.