An improved power consumption circuit of a 5.7 GHz variable-gain low noise amplifier (VGLNA) for RF applications
A low voltage topology that uses a capacitively coupled resonating element has been introduced using 0.18 mum CMOS technology. The topology utilizes the decoupling scheme to dc isolate circuit elements that are connected in series and share a common dc current. A 5.7 GHz variable-gain low noise ampl...
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| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
IEEE
2006
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| Online Access: | http://psasir.upm.edu.my/id/eprint/47633/1/An%20improved%20power%20consumption%20circuit%20of%20a%205.7%20GHz%20variable-gain%20low%20noise%20amplifier%20%28VGLNA%29%20for%20RF%20applications.pdf http://psasir.upm.edu.my/id/eprint/47633/ |
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| Summary: | A low voltage topology that uses a capacitively coupled resonating element has been introduced using 0.18 mum CMOS technology. The topology utilizes the decoupling scheme to dc isolate circuit elements that are connected in series and share a common dc current. A 5.7 GHz variable-gain low noise amplifier (VGLNA) is presented with simulation results exhibiting a noise figure of 1.02 dB, power gain of 19.41 dB with gain tuning range of 6 dB and IIP3 of -1.11 dBm. The power consumption reported is 12.88 mW at supply of Vdd = 0.7 V for power optimization circuit. Simulation results show that the proposed VGLNA has better noise performance and improved power consumption compared to the conventional cascode VGLNA. |
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