Fault detection with optimum March test algorithm

This paper presents a research work aimed to detect previously-undetected faults, either Write Disturb Faults (WDFs) or Deceptive Read Destructive Faults (DRDFs) or both in March Algorithm such as MATS++(6N), March C-(10N), March SR(14N), and March CL(12N). The main focus of this research is to impr...

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Bibliographic Details
Main Authors: Zakaria, Nor Azura, Wan Hassan, Wan Zuha, Abdul Halin, Izhal, Mohd Sidek, Roslina, Xiao, Qing Wen
Format: Article
Language:English
Published: Asian Research Publication Network 2013
Online Access:http://psasir.upm.edu.my/id/eprint/28805/1/Fault%20detection%20with%20optimum%20March%20test%20algorithm.pdf
http://psasir.upm.edu.my/id/eprint/28805/
http://www.jatit.org/volumes/Vol47No1/fourtyseventh_volume_1_2013.php
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Summary:This paper presents a research work aimed to detect previously-undetected faults, either Write Disturb Faults (WDFs) or Deceptive Read Destructive Faults (DRDFs) or both in March Algorithm such as MATS++(6N), March C-(10N), March SR(14N), and March CL(12N). The main focus of this research is to improve fault coverage on Single Cell Faults as well as Static Double Cell Faults detection, using specified test algorithm. Transition Coupling Faults (CFtrs), Write Destructive Coupling Faults (CFwds) and Deceptive Read Destructive Faults (CFdrds) are types of faults mainly used in this research. The experiment result published in [1] shows BIST (Built-In-Self-Test) implementation with the new algorithm. It provides the same test length but with bigger area overhead, we therefore proposed a new 14N March Test Algorithm with fault coverage of more than 95% using solid 0s and 1s Data Background (DB). This paper reveals the design methodology to generate DB covers all memories function by applying non-transition data, transition data, and single read and double read data. The automation hardware was designed to give the flexibility to the user to generate other new March Algorithm prior to the selected algorithm and analyzed the performance in terms of fault detection and power consumption.