Choices on designing GF (p) elliptic curve coprocessor benefiting from mapping homogeneous curves in parallel multiplications

Modular inversion operation is known to be the most time consuming operation in ECC field arithmetic computations. In addition, Many ECC designs that use projective coordinates over GF (p) have not considered different factors that affect the design of ECC such as area, hardware utilization, cost (A...

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Bibliographic Details
Main Authors: Al-Haija, Qasem Abu, Al-Khatib, Mohammad Hussein Fayiz, Jaafar, Azmi
Format: Article
Language:English
Published: Engg Journals Publications 2011
Online Access:http://psasir.upm.edu.my/id/eprint/22500/1/IJCSE11-03-02-056.pdf
http://psasir.upm.edu.my/id/eprint/22500/
http://www.enggjournals.com/ijcse/issue.html?issue=20110302
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Summary:Modular inversion operation is known to be the most time consuming operation in ECC field arithmetic computations. In addition, Many ECC designs that use projective coordinates over GF (p) have not considered different factors that affect the design of ECC such as area, hardware utilization, cost (AT2) and performance factors which are crucial in many ECC applications. This paper proposes to use several projective coordinates to compute the standard ECC point doubling over GF (p) with no inversion operations due to the ability of projective coordinates to convert each inversion to several multiplication steps which are applied in parallel. We tune-up the mentioned factors by using a variable degree of parallelization benefiting from the inherent parallelism in ECC computations. The aim is to provide different design choices that can be utilized in several ECC applications. Out results show that projection (X/Z, Y/Z) gives the best results in terms of time-consuming using 5 parallel multipliers compared to other projections. Furthermore, both projections (X/Z, Y/Z) and (X/Z2, Y/Z3) achieve the highest hardware utilization enhancements when using 2 and 3 parallel multipliers respectively. A trade-off between factors such as security, area and time-consuming is which control the design of ECC, the more parallelization leads to less time-consuming. However, with extra area needed for parallel ECC operations.