Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device
The process parameters are very crucial factor in the development of transistors. There are many process parameters that influenced in the development of the transistors. In this research, we investigate the effects of the process parameters variation on response characteristics such as threshold vo...
Saved in:
Main Authors: | , , , |
---|---|
Format: | Article |
Language: | English |
Published: |
American Institute of Physics Inc.
2017
|
Subjects: | |
Online Access: | http://dspace.uniten.edu.my:80/jspui/handle/123456789/7 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
id |
my.uniten.dspace-7 |
---|---|
record_format |
dspace |
spelling |
my.uniten.dspace-72018-03-12T10:03:18Z Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device Atan, N.B. Ahmad, I.B. Majlis, B.B.Y. Fauzi, I.B.A. HfO2-High-K dielectric Silvaco Software Taguchi Method TiSi2-Metal Gate Transistor The process parameters are very crucial factor in the development of transistors. There are many process parameters that influenced in the development of the transistors. In this research, we investigate the effects of the process parameters variation on response characteristics such as threshold voltage (VTH) and sub-threshold leakage current (IOFF) in 18nm NMOS device. The technique to identify semiconductor process parameters whose variability would impact most on the device characteristic is realized through the process by using Taguchi robust design method. This paper presents the process parameters that influenced in threshold voltage (VTH) and sub-threshold leakage current (IOFF) which includes the Halo Implantation, Compensation Implantation, Adjustment Threshold voltage Implantation and Source/Drain Implantation. The design, fabrication and characterization of 18nm HfO2/TiSi2 NMOS device is simulated and performed via a tool called Virtual Wafer Fabrication (VWF) Silvaco TCAD Tool known as ATHENA and ATLAS simulators. These two simulators were combined with Taguchi L9 Orthogonal method to aid in the design and the optimization of the process parameters to achieve the optimum average of threshold voltage (VTH) and sub-threshold leakage current, (IOFF) in 18nm device. Results from this research were obtained; where Halo Implantation dose was identified as one of the process parameter that has the strongest effect on the response characteristics. Whereby the Compensation Implantation dose was identified as an adjustment factor to get the nominal values of threshold voltage VTH, and sub-threshold leakage current, IOFF for 18nm NMOS devices equal to 0.302849 volts and 1.9123×10-16 A/μm respectively. The design values are referred to ITRS 2011 prediction. © 2015 AIP Publishing LLC. 2017-04-27T09:08:51Z 2017-04-27T09:08:51Z 2015 Article 9780735412996 0094243X http://dspace.uniten.edu.my:80/jspui/handle/123456789/7 10.1063/1.4915221 en American Institute of Physics Inc. |
institution |
Universiti Tenaga Nasional |
building |
UNITEN Library |
collection |
Institutional Repository |
continent |
Asia |
country |
Malaysia |
content_provider |
Universiti Tenaga Nasional |
content_source |
UNITEN Institutional Repository |
url_provider |
http://dspace.uniten.edu.my/ |
language |
English |
topic |
HfO2-High-K dielectric Silvaco Software Taguchi Method TiSi2-Metal Gate Transistor |
spellingShingle |
HfO2-High-K dielectric Silvaco Software Taguchi Method TiSi2-Metal Gate Transistor Atan, N.B. Ahmad, I.B. Majlis, B.B.Y. Fauzi, I.B.A. Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device |
description |
The process parameters are very crucial factor in the development of transistors. There are many process parameters that influenced in the development of the transistors. In this research, we investigate the effects of the process parameters variation on response characteristics such as threshold voltage (VTH) and sub-threshold leakage current (IOFF) in 18nm NMOS device. The technique to identify semiconductor process parameters whose variability would impact most on the device characteristic is realized through the process by using Taguchi robust design method. This paper presents the process parameters that influenced in threshold voltage (VTH) and sub-threshold leakage current (IOFF) which includes the Halo Implantation, Compensation Implantation, Adjustment Threshold voltage Implantation and Source/Drain Implantation. The design, fabrication and characterization of 18nm HfO2/TiSi2 NMOS device is simulated and performed via a tool called Virtual Wafer Fabrication (VWF) Silvaco TCAD Tool known as ATHENA and ATLAS simulators. These two simulators were combined with Taguchi L9 Orthogonal method to aid in the design and the optimization of the process parameters to achieve the optimum average of threshold voltage (VTH) and sub-threshold leakage current, (IOFF) in 18nm device. Results from this research were obtained; where Halo Implantation dose was identified as one of the process parameter that has the strongest effect on the response characteristics. Whereby the Compensation Implantation dose was identified as an adjustment factor to get the nominal values of threshold voltage VTH, and sub-threshold leakage current, IOFF for 18nm NMOS devices equal to 0.302849 volts and 1.9123×10-16 A/μm respectively. The design values are referred to ITRS 2011 prediction. © 2015 AIP Publishing LLC. |
format |
Article |
author |
Atan, N.B. Ahmad, I.B. Majlis, B.B.Y. Fauzi, I.B.A. |
author_facet |
Atan, N.B. Ahmad, I.B. Majlis, B.B.Y. Fauzi, I.B.A. |
author_sort |
Atan, N.B. |
title |
Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device |
title_short |
Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device |
title_full |
Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device |
title_fullStr |
Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device |
title_full_unstemmed |
Influence of process parameters on threshold voltage and leakage current in 18nm NMOS device |
title_sort |
influence of process parameters on threshold voltage and leakage current in 18nm nmos device |
publisher |
American Institute of Physics Inc. |
publishDate |
2017 |
url |
http://dspace.uniten.edu.my:80/jspui/handle/123456789/7 |
_version_ |
1644492152870273024 |
score |
13.214268 |