Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components

Electric inverters; Harmonic analysis; Pulse width modulation; Simulink; Voltage control; Component count; Generation units; Hybrid multilevel inverter; Multilevel inverter topology; Output voltages; Pulsewidth modulations (PWM); Reduced switch; Selective harmonic elimination; Single phasis; Switch...

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Main Authors: Wasiq M., Memon M.A., Shrivastava P., Mekhilef S., Seyedmahmoudian M., Stojcevski A., Horan B.
Other Authors: 57338013900
Format: Article
Published: John Wiley and Sons Inc 2023
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spelling my.uniten.dspace-270962023-05-29T17:39:29Z Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components Wasiq M. Memon M.A. Shrivastava P. Mekhilef S. Seyedmahmoudian M. Stojcevski A. Horan B. 57338013900 57195504717 57200696172 57928298500 55575761400 55884935900 57202873469 Electric inverters; Harmonic analysis; Pulse width modulation; Simulink; Voltage control; Component count; Generation units; Hybrid multilevel inverter; Multilevel inverter topology; Output voltages; Pulsewidth modulations (PWM); Reduced switch; Selective harmonic elimination; Single phasis; Switch counts; Topology In this paper, a reduced switch count single-phase hybrid multilevel inverter (MLI) is presented. Level generation unit (LGU) and polarity changing unit (PCU) are the two parts of the presented topology which are connected in series. Other advantages of the proposed topology include the reduced switch count, higher level generation with reduced sources and the possibility of higher-level generation with lower component counts. A single unit produces an output voltage of 13 levels with the modulation techniques as selective harmonic elimination pulse width modulation (SHEPWM) to improve harmonics. The use of selective harmonic elimination (SHM) is made to improve harmonics. The logical generation unit carries a series connection of multiple switched dc voltage sources with half and full-bridge configurations. The proposed topology is verified by a hardware bench setup as well as in simulations which are developed in Simulink/MATLAB� environment. � 2022 The Authors. IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology. Article in Press 2023-05-29T09:39:29Z 2023-05-29T09:39:29Z 2022 Article 10.1049/pel2.12375 2-s2.0-85140220864 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85140220864&doi=10.1049%2fpel2.12375&partnerID=40&md5=a5f8f24aa0602f1c7342f084e3e07b73 https://irepository.uniten.edu.my/handle/123456789/27096 John Wiley and Sons Inc Scopus
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
description Electric inverters; Harmonic analysis; Pulse width modulation; Simulink; Voltage control; Component count; Generation units; Hybrid multilevel inverter; Multilevel inverter topology; Output voltages; Pulsewidth modulations (PWM); Reduced switch; Selective harmonic elimination; Single phasis; Switch counts; Topology
author2 57338013900
author_facet 57338013900
Wasiq M.
Memon M.A.
Shrivastava P.
Mekhilef S.
Seyedmahmoudian M.
Stojcevski A.
Horan B.
format Article
author Wasiq M.
Memon M.A.
Shrivastava P.
Mekhilef S.
Seyedmahmoudian M.
Stojcevski A.
Horan B.
spellingShingle Wasiq M.
Memon M.A.
Shrivastava P.
Mekhilef S.
Seyedmahmoudian M.
Stojcevski A.
Horan B.
Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
author_sort Wasiq M.
title Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
title_short Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
title_full Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
title_fullStr Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
title_full_unstemmed Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
title_sort selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components
publisher John Wiley and Sons Inc
publishDate 2023
_version_ 1806425551790931968
score 13.214268