Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation

The power quality disturbance in a power distribution network was voltage sag and swell and voltage harmonic. New ideas, methods and techniques had been introduced by researchers to improve the quality of supply particularly at the sensitive load end. Many of these methods have their own drawbacks s...

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Main Authors: Chandrasekaran K., Ramachandaramurthy V.K.
Other Authors: 57220516457
Format: Conference Paper
Published: IEOM Society 2023
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spelling my.uniten.dspace-250082023-05-29T15:30:16Z Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation Chandrasekaran K. Ramachandaramurthy V.K. 57220516457 6602912020 The power quality disturbance in a power distribution network was voltage sag and swell and voltage harmonic. New ideas, methods and techniques had been introduced by researchers to improve the quality of supply particularly at the sensitive load end. Many of these methods have their own drawbacks such as complexity, slow response and sensitivity to parameter variations. In this research, an improved Dynamic Voltage Restorer (DVR) topology has been designed and modeled to be used on a 415 Volts distribution network. A seven level cascaded multilevel inverter using multicarrier SPWM technique controller was proposed to handle the voltage imperfections. An innovative controller based on the Synchronous Rotating Reference Frame (SRRF) to overcome the disadvantages of the existing controller schemes by reducing the complexity, number of signal measurements and computing time has been developed. The controller was able to control the zero sequence voltage during unbalance fault period. The switching frequency of the phase shift SPWM was low and hence, the switching loss was low. The Total Harmonic Distortion (THD) with the proposed DVR was significantly reduced to 1.64 % as compared to other traditional models and was within the IEEE Standards 519-2014. The proposed controller algorithm provides excellent voltage compensation. � IEOM Society International. Final 2023-05-29T07:30:16Z 2023-05-29T07:30:16Z 2019 Conference Paper 2-s2.0-85067226054 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85067226054&partnerID=40&md5=b7863745d87a31359043b64f74638dc8 https://irepository.uniten.edu.my/handle/123456789/25008 2019 MAR 1614 1622 IEOM Society Scopus
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
description The power quality disturbance in a power distribution network was voltage sag and swell and voltage harmonic. New ideas, methods and techniques had been introduced by researchers to improve the quality of supply particularly at the sensitive load end. Many of these methods have their own drawbacks such as complexity, slow response and sensitivity to parameter variations. In this research, an improved Dynamic Voltage Restorer (DVR) topology has been designed and modeled to be used on a 415 Volts distribution network. A seven level cascaded multilevel inverter using multicarrier SPWM technique controller was proposed to handle the voltage imperfections. An innovative controller based on the Synchronous Rotating Reference Frame (SRRF) to overcome the disadvantages of the existing controller schemes by reducing the complexity, number of signal measurements and computing time has been developed. The controller was able to control the zero sequence voltage during unbalance fault period. The switching frequency of the phase shift SPWM was low and hence, the switching loss was low. The Total Harmonic Distortion (THD) with the proposed DVR was significantly reduced to 1.64 % as compared to other traditional models and was within the IEEE Standards 519-2014. The proposed controller algorithm provides excellent voltage compensation. � IEOM Society International.
author2 57220516457
author_facet 57220516457
Chandrasekaran K.
Ramachandaramurthy V.K.
format Conference Paper
author Chandrasekaran K.
Ramachandaramurthy V.K.
spellingShingle Chandrasekaran K.
Ramachandaramurthy V.K.
Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation
author_sort Chandrasekaran K.
title Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation
title_short Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation
title_full Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation
title_fullStr Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation
title_full_unstemmed Design of seven level Dynamic Voltage Restorer for voltage sag and harmonics mitigation
title_sort design of seven level dynamic voltage restorer for voltage sag and harmonics mitigation
publisher IEOM Society
publishDate 2023
_version_ 1806427439555936256
score 13.188404