Power Electronics Building Block (PEBB) hardware design and reliability prediction
Architectural design; Failure analysis; Hardware; Power converters; Power electronics; Reliability; Reliability analysis; Software design; Stress analysis; Communication interface; Failure rate; Hardware and software designs; Modular multilevel converters; Power Electronics Building Blocks; Power el...
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Institute of Electrical and Electronics Engineers Inc.
2023
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my.uniten.dspace-231802023-05-29T14:38:14Z Power Electronics Building Block (PEBB) hardware design and reliability prediction Toh C.L. Wong Y.M. Norum L.E. 8690228000 57194947416 6701577565 Architectural design; Failure analysis; Hardware; Power converters; Power electronics; Reliability; Reliability analysis; Software design; Stress analysis; Communication interface; Failure rate; Hardware and software designs; Modular multilevel converters; Power Electronics Building Blocks; Power electronics converters; Reliability block diagrams; Reliability prediction; Outages Power Electronics Building Block (PEBB) concept has been proposed to simplify the conventional design process and reduce engineering efforts. The main idea of PEBB is to standardize the hardware and software design. A PEBB hardware is a power processor which integrates different groups of hardware components such as power semiconductors, sensing measurements and communication interface elements. Different range of power converters can be constructed easily by connecting a number of identical PEBBs in series and/or parallel. However, failure of a PEBB will degrade the reliability level of these converters. To prevent system breakdown, the life span of a PEBB hardware must be estimated so that maintenance works can be planned ahead. Therefore, this paper demonstrates part stress analysis to estimate a useful-life-cycle (Mean Time To Failure) of a well-developed PEBB hardware prototype. This PEBB has been used to construct a small-scaled modular multilevel converter for laboratory testing. Full reliability block diagram analysis and simplification techniques are enclosed. � 2016 IEEE. Final 2023-05-29T06:38:14Z 2023-05-29T06:38:14Z 2017 Conference Paper 10.1109/PECON.2016.7951553 2-s2.0-85024403514 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85024403514&doi=10.1109%2fPECON.2016.7951553&partnerID=40&md5=861b1a6206c9161c229a4f016c0e3c18 https://irepository.uniten.edu.my/handle/123456789/23180 7951553 166 171 Institute of Electrical and Electronics Engineers Inc. Scopus |
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| description |
Architectural design; Failure analysis; Hardware; Power converters; Power electronics; Reliability; Reliability analysis; Software design; Stress analysis; Communication interface; Failure rate; Hardware and software designs; Modular multilevel converters; Power Electronics Building Blocks; Power electronics converters; Reliability block diagrams; Reliability prediction; Outages |
| author2 |
8690228000 |
| author_facet |
8690228000 Toh C.L. Wong Y.M. Norum L.E. |
| format |
Conference Paper |
| author |
Toh C.L. Wong Y.M. Norum L.E. |
| spellingShingle |
Toh C.L. Wong Y.M. Norum L.E. Power Electronics Building Block (PEBB) hardware design and reliability prediction |
| author_sort |
Toh C.L. |
| title |
Power Electronics Building Block (PEBB) hardware design and reliability prediction |
| title_short |
Power Electronics Building Block (PEBB) hardware design and reliability prediction |
| title_full |
Power Electronics Building Block (PEBB) hardware design and reliability prediction |
| title_fullStr |
Power Electronics Building Block (PEBB) hardware design and reliability prediction |
| title_full_unstemmed |
Power Electronics Building Block (PEBB) hardware design and reliability prediction |
| title_sort |
power electronics building block (pebb) hardware design and reliability prediction |
| publisher |
Institute of Electrical and Electronics Engineers Inc. |
| publishDate |
2023 |
| _version_ |
1806427891563495424 |
| score |
13.250246 |