Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS
The poly-Si/SiO2 based MOSFETs have been encountering a problem with the limitation of channel length for the device miniaturization. The drain induced barrier lowering (DIBL) effect is the main threat for the device to acquire excellent device's characteristics. Thus, the metal-gate/high-k tec...
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my.uniten.dspace-227112023-05-29T14:11:46Z Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS Kaharudin K.E. Salehuddin F. Zain A.S.M. Aziz M.N.I.A. Ahmad I. 56472706900 36239165300 55925762500 56508975500 12792216600 The poly-Si/SiO2 based MOSFETs have been encountering a problem with the limitation of channel length for the device miniaturization. The drain induced barrier lowering (DIBL) effect is the main threat for the device to acquire excellent device's characteristics. Thus, the metal-gate/high-k technology is a smart choice for the future replacement of poly-Si/SiO2 channel. This paper introduces the implementation of WSix/TiO2 channel to replace the poly-Si/SiO2 channel in vertical double-gate NMOS structure, followed by the application of Taguchi method to reduce the drain induced barrier lowering (DIBL) effects. The device was virtually fabricated and characterized by using both ATHENA and ATLAS modules of SILVACO TCAD tools. The L12 orthogonal array, main effects, signal-to noise ratio (SNR) and analysis of variance (ANOVA) were utilized to analyze the effect of process parameter variations on the DIBL. Later, the interactions between the process parameters were investigated by using L8 orthogonal array of Taguchi method. Based on the final results, halo implant tilt angle and source/drain (S/D) implant energy were identified as the most dominant process parameters where each of them contributes 24% and 16% of factor effects on SNR respectively. The lowest possible value of DIBL after the optimization with the interaction test is 1.552 mV/V. � 2006-2016 Asian Research Publishing Network (ARPN). Final 2023-05-29T06:11:45Z 2023-05-29T06:11:45Z 2016 Article 2-s2.0-84978727600 https://www.scopus.com/inward/record.uri?eid=2-s2.0-84978727600&partnerID=40&md5=701cecf966403fcf608cbca90b1347b2 https://irepository.uniten.edu.my/handle/123456789/22711 11 11 7093 7103 Asian Research Publishing Network Scopus |
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The poly-Si/SiO2 based MOSFETs have been encountering a problem with the limitation of channel length for the device miniaturization. The drain induced barrier lowering (DIBL) effect is the main threat for the device to acquire excellent device's characteristics. Thus, the metal-gate/high-k technology is a smart choice for the future replacement of poly-Si/SiO2 channel. This paper introduces the implementation of WSix/TiO2 channel to replace the poly-Si/SiO2 channel in vertical double-gate NMOS structure, followed by the application of Taguchi method to reduce the drain induced barrier lowering (DIBL) effects. The device was virtually fabricated and characterized by using both ATHENA and ATLAS modules of SILVACO TCAD tools. The L12 orthogonal array, main effects, signal-to noise ratio (SNR) and analysis of variance (ANOVA) were utilized to analyze the effect of process parameter variations on the DIBL. Later, the interactions between the process parameters were investigated by using L8 orthogonal array of Taguchi method. Based on the final results, halo implant tilt angle and source/drain (S/D) implant energy were identified as the most dominant process parameters where each of them contributes 24% and 16% of factor effects on SNR respectively. The lowest possible value of DIBL after the optimization with the interaction test is 1.552 mV/V. � 2006-2016 Asian Research Publishing Network (ARPN). |
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56472706900 |
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56472706900 Kaharudin K.E. Salehuddin F. Zain A.S.M. Aziz M.N.I.A. Ahmad I. |
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Kaharudin K.E. Salehuddin F. Zain A.S.M. Aziz M.N.I.A. Ahmad I. |
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Kaharudin K.E. Salehuddin F. Zain A.S.M. Aziz M.N.I.A. Ahmad I. Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS |
author_sort |
Kaharudin K.E. |
title |
Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS |
title_short |
Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS |
title_full |
Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS |
title_fullStr |
Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS |
title_full_unstemmed |
Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS |
title_sort |
application of taguchi method with the interaction test for lower dibl in wsix/tio2 channel vertical double gate nmos |
publisher |
Asian Research Publishing Network |
publishDate |
2023 |
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1806423376226418688 |
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13.214268 |