Design of 3.1-10.6 GHz UWB CMOS Power Amplifier using Cascade Topology

• Main Authors: Rohana, Sapawi, Dayang Halimah, Abang Ahmad, Kuryati, Kipli, Kismet, Hong Ping, Norhuzaimin, Julai, Sohiful Anuar, Zainol Murad, Dayang Nur Salmi Dharmiza, Awang Salleh, Dayang Azra, Awang Mat, Shamsiah, Suhaili, Asrani, Lit
• Format: Article
• Language: English
• Published: Semarak Ilmu Publishing 2023
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://ir.unimas.my/id/eprint/43188/2/Design.pdf; http://ir.unimas.my/id/eprint/43188/; https://semarakilmu.com.my/journals/index.php/applied_sciences_eng_tech/article/view/1982

Power amplifier is an important component in the wireless communication system. Design of the power amplifier in UWB transceiver is challenging as the signal need to be transmitted over a wide bandwidth. Several criteria need to be fulfilled such as good linearity, good wideband matching, high efficiency and low power consumption.This paper presents the design of a power amplifier with 3.1-10.6 GHz using 0.18 μm CMOS technology for ultra-wide band application. The proposed power amplifier used three cascaded amplifier stages in order to achieve good gain and wide-band width. The results show that the proposed power amplifier design hasan average gain of 7.28 dB, an input return loss less than -7.48 dB, an output return loss less than -4.782 dB, and group delay variation of ±151.9 ps is achieved over the entire band. A good input1dB-compression point of 6.67 dBm and input third order intercept point of 0 dBm is achieved at 5 GHz.