DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE
Nowadays information security is the highest priority as it is intended to protect information that has value to people and organizations. It involves more than protecting the information itself. However, computer networks have a lot of vulnerabilities and threats. Previously, many encryption algor...
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Universiti Malaysia Sarawak, (UNIMAS)
2019
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Online Access: | http://ir.unimas.my/id/eprint/34314/1/Florisca.pdf http://ir.unimas.my/id/eprint/34314/4/Florisca%20Aldina%20Godulus%20ft.pdf http://ir.unimas.my/id/eprint/34314/ |
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my.unimas.ir.343142023-08-17T08:00:38Z http://ir.unimas.my/id/eprint/34314/ DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE FLORISCA, ALDINA GODULUS TK Electrical engineering. Electronics Nuclear engineering Nowadays information security is the highest priority as it is intended to protect information that has value to people and organizations. It involves more than protecting the information itself. However, computer networks have a lot of vulnerabilities and threats. Previously, many encryption algorithms have been investigated. The Cryptography Algorithm is used to protect data through encryption that allows sensitive information to be passed through the network safely. The data is securely encrypted in a way that no third party can access it except the intended recipient. The cryptography can also verify the authenticity of the sender. It prove that the sender was legitimate and not an impostor. Further, the hash function uses a mathematics conversion to inevitable “encrypt” messages to provide a digital fingerprint. Basically it is used for message digest. One of the algorithms in hash function is RIPEMD-160. The RIPEMD-160 can improve the security in storing information. This project used iterative method to investigate the security algorithm and implemented the algorithm. Besides that, iterative methods also used to improve the frequency, power and are requirements performance of RIPEMD-160 hash function. It is implemented using Verilog HDL software and simulated using the ModelSim software. The efficiency of the result is determined for the maximum of the frequency at 136 MHz and the area is at 692.9 Mbps from the Quartus II software platform. Universiti Malaysia Sarawak, (UNIMAS) 2019 Final Year Project Report NonPeerReviewed text en http://ir.unimas.my/id/eprint/34314/1/Florisca.pdf text en http://ir.unimas.my/id/eprint/34314/4/Florisca%20Aldina%20Godulus%20ft.pdf FLORISCA, ALDINA GODULUS (2019) DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE. [Final Year Project Report] (Unpublished) |
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TK Electrical engineering. Electronics Nuclear engineering FLORISCA, ALDINA GODULUS DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE |
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Nowadays information security is the highest priority as it is intended to protect information that has value to people and organizations. It involves more than protecting the information itself. However, computer networks have a lot of vulnerabilities and threats.
Previously, many encryption algorithms have been investigated. The Cryptography Algorithm is used to protect data through encryption that allows sensitive information to be passed through the network safely. The data is securely encrypted in a way that no third
party can access it except the intended recipient. The cryptography can also verify the authenticity of the sender. It prove that the sender was legitimate and not an impostor. Further, the hash function uses a mathematics conversion to inevitable “encrypt” messages
to provide a digital fingerprint. Basically it is used for message digest. One of the algorithms in hash function is RIPEMD-160. The RIPEMD-160 can improve the security in storing information. This project used iterative method to investigate the security algorithm
and implemented the algorithm. Besides that, iterative methods also used to improve the frequency, power and are requirements performance of RIPEMD-160 hash function. It is implemented using Verilog HDL software and simulated using the ModelSim software. The efficiency of the result is determined for the maximum of the frequency at 136 MHz
and the area is at 692.9 Mbps from the Quartus II software platform. |
format |
Final Year Project Report |
author |
FLORISCA, ALDINA GODULUS |
author_facet |
FLORISCA, ALDINA GODULUS |
author_sort |
FLORISCA, ALDINA GODULUS |
title |
DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE |
title_short |
DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE |
title_full |
DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE |
title_fullStr |
DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE |
title_full_unstemmed |
DESIGN AND IMPLEMENTATION OF RIPEMD-160 ALGORITHM ON RECONFIGURABLE HARDWARE |
title_sort |
design and implementation of ripemd-160 algorithm on reconfigurable hardware |
publisher |
Universiti Malaysia Sarawak, (UNIMAS) |
publishDate |
2019 |
url |
http://ir.unimas.my/id/eprint/34314/1/Florisca.pdf http://ir.unimas.my/id/eprint/34314/4/Florisca%20Aldina%20Godulus%20ft.pdf http://ir.unimas.my/id/eprint/34314/ |
_version_ |
1775627294944002048 |
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13.160551 |