A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless Applications
The design of a 2.4-GHz CMOS class-F power amplifier (PA) for wireless applications is presented in this paper. The class- F PA design is implemented using 0.13-μm CMOS process. It utilizes two stages cascade topology and the transistors are arranged in parallel to reduce the transistor’s on resi...
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2015
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my.unimas.ir.103052017-02-14T04:53:08Z http://ir.unimas.my/id/eprint/10305/ A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless Applications Sohiful Anuar, Zainol Murad Mohd Najib, Mohd Yasin Faizah, Abu Bakar Norhawati, Ahmad Rohana, Sapawi TA Engineering (General). Civil engineering (General) The design of a 2.4-GHz CMOS class-F power amplifier (PA) for wireless applications is presented in this paper. The class- F PA design is implemented using 0.13-μm CMOS process. It utilizes two stages cascade topology and the transistors are arranged in parallel to reduce the transistor’s on resistance which correspondingly increase the PA efficiency. The simulation results show that the PA delivers 12 dBm output power and 60% power added efficiency (PAE) into a 50 Ω load. The supply voltage is 1.3 V and the chip layout is 0.66 mm². 2015 Conference or Workshop Item NonPeerReviewed text en http://ir.unimas.my/id/eprint/10305/1/NO%203%20A%202.4%20GHz%20two%20stage%20CMOS%20class-F%20power%20amplifier%20for%20wireless%20applications%20%28abstract%29.pdf Sohiful Anuar, Zainol Murad and Mohd Najib, Mohd Yasin and Faizah, Abu Bakar and Norhawati, Ahmad and Rohana, Sapawi (2015) A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless Applications. In: The Electronic And Green Materials International Conference 2015 (Egm2015), Surabaya, Indonesia. |
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TA Engineering (General). Civil engineering (General) Sohiful Anuar, Zainol Murad Mohd Najib, Mohd Yasin Faizah, Abu Bakar Norhawati, Ahmad Rohana, Sapawi A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless Applications |
description |
The design of a 2.4-GHz CMOS class-F power amplifier (PA) for wireless applications is
presented in this paper. The class- F PA design is implemented using 0.13-μm CMOS process. It
utilizes two stages cascade topology and the transistors are arranged in parallel to reduce the
transistor’s on resistance which correspondingly increase the PA efficiency. The simulation results
show that the PA delivers 12 dBm output power and 60% power added efficiency (PAE) into a 50 Ω
load. The supply voltage is 1.3 V and the chip layout is 0.66 mm². |
format |
Conference or Workshop Item |
author |
Sohiful Anuar, Zainol Murad Mohd Najib, Mohd Yasin Faizah, Abu Bakar Norhawati, Ahmad Rohana, Sapawi |
author_facet |
Sohiful Anuar, Zainol Murad Mohd Najib, Mohd Yasin Faizah, Abu Bakar Norhawati, Ahmad Rohana, Sapawi |
author_sort |
Sohiful Anuar, Zainol Murad |
title |
A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless
Applications |
title_short |
A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless
Applications |
title_full |
A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless
Applications |
title_fullStr |
A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless
Applications |
title_full_unstemmed |
A 2.4 GHz Two Stage CMOS Class-F Power Amplifier for Wireless
Applications |
title_sort |
2.4 ghz two stage cmos class-f power amplifier for wireless
applications |
publishDate |
2015 |
url |
http://ir.unimas.my/id/eprint/10305/1/NO%203%20A%202.4%20GHz%20two%20stage%20CMOS%20class-F%20power%20amplifier%20for%20wireless%20applications%20%28abstract%29.pdf http://ir.unimas.my/id/eprint/10305/ |
_version_ |
1644510927230337024 |
score |
13.160551 |