Cover Image

FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL

Organized by School of Mechatronic Engineering (UniMAP) & co-organized by The Institution of Engineering Malaysia (IEM), 11th - 13th October 2009 at Batu Feringhi, Penang, Malaysia.

Saved in:
Bibliographic Details
Main Author: Kushal, Sreedhar
Other Authors: kushalsathreya@gmail.com
Format: Working Paper
Language:English
Published: Universiti Malaysia Perlis 2009
Subjects:
Field programmable gate arrays
Compact flash
System ACE controller
USB host controller
Configurable Logic Block
JTAG connector
EEPROM
Gate array circuits
Programmable logic devices
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/7344
Tags: Add Tag
No Tags, Be the first to tag this record!
id my.unimap-7344
record_format dspace
spelling my.unimap-73442010-01-18T07:44:21Z FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL Kushal, Sreedhar kushalsathreya@gmail.com Field programmable gate arrays Compact flash System ACE controller USB host controller Configurable Logic Block JTAG connector EEPROM Gate array circuits Programmable logic devices Organized by School of Mechatronic Engineering (UniMAP) & co-organized by The Institution of Engineering Malaysia (IEM), 11th - 13th October 2009 at Batu Feringhi, Penang, Malaysia. This paper gives a novel yet convenient technique of configuring a Virtex-5 FPGA device through the Universal Serial Bus(USB) port. The monotonous parallel port configuration using JTAG connectors is overcome by USB-port programming of the FPGA either in C or HDL (Hardware Description Language). A Xilinx Development platform (ML506 Evaluation platform is considered) consisting of the Field Programmable Gate Array (FPGA) populated with an SXT device is initially configured to henceforth being reconfigurable through the USB on reset/power up. The encrypted configuration bit stream arriving at the USB port is first accessed by the onchip USB Controller operating preferably on a standalone mode. The data is then loaded on to the Type-I Compact Flash (CF) storage device (expandable to 8GB) through the System ACE controller. The System ACE MPU port is connected to the FPGA which allows the System ACE Controller to access the Compact Flash Card as a generic FAT File system. The FPGA is finally configured either in Serial/Select MAP modes through the dedicated pins. The reason why USB method is more beneficial is that it is more versatile, and doesn't require JTAG connectors which are scanty. Also, in areas where FPGA programming is done more frequently, USB method eliminates the process of disconnecting and reconnecting the subsequent FPGA boards, since the USB cable can be permanently connected with the respective FPGAs. It is faster to program FPGAs in bulk, also cheaper as the connectors are more costly than the USB cable. 2009-11-18T08:18:18Z 2009-11-18T08:18:18Z 2009-10-11 Working Paper p.4B3 1 - 4B3 6 http://hdl.handle.net/123456789/7344 en Proceedings of the International Conference on Man-Machine Systems (ICoMMS 2009) Universiti Malaysia Perlis
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Field programmable gate arrays
Compact flash
System ACE controller
USB host controller
Configurable Logic Block
JTAG connector
EEPROM
Gate array circuits
Programmable logic devices
spellingShingle Field programmable gate arrays
Compact flash
System ACE controller
USB host controller
Configurable Logic Block
JTAG connector
EEPROM
Gate array circuits
Programmable logic devices
Kushal, Sreedhar
FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL
description Organized by School of Mechatronic Engineering (UniMAP) & co-organized by The Institution of Engineering Malaysia (IEM), 11th - 13th October 2009 at Batu Feringhi, Penang, Malaysia.
author2 kushalsathreya@gmail.com
author_facet kushalsathreya@gmail.com
Kushal, Sreedhar
format Working Paper
author Kushal, Sreedhar
author_sort Kushal, Sreedhar
title FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL
title_short FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL
title_full FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL
title_fullStr FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL
title_full_unstemmed FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL
title_sort fpga configuration on xilinx ml506 development board through the usb port in c/hdl
publisher Universiti Malaysia Perlis
publishDate 2009
url http://dspace.unimap.edu.my/xmlui/handle/123456789/7344
_version_ 1643788784366518272
score 13.214268

Similar Items