16-Bits High Speed Carry Select Adder

Access is limited to UniMAP community.

Saved in:
Bibliographic Details
Main Author: Nur Syuhada Muhammad Khariri
Other Authors: Norina Idris (Advisor)
Format: Learning Object
Language:English
Published: Universiti Malaysia Perlis 2008
Subjects:
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/1361
Tags: Add Tag
No Tags, Be the first to tag this record!
id my.unimap-1361
record_format dspace
spelling my.unimap-13612008-10-08T09:04:02Z 16-Bits High Speed Carry Select Adder Nur Syuhada Muhammad Khariri Norina Idris (Advisor) Metal oxide semiconductors, Complementary Mentor Graphic software Carry select adder (CSeA) CMOS transistors Computer arithmetic and logic units Data transmission systems High speed adder Access is limited to UniMAP community. This report presents the design, performance evaluation of two design of 16-bit carry select adder. The layout for the high speed 16-bits carry-select adder was present in this report. The comparison of both designs is to determine a design with the high speed performance. This design approach is to minimize the carry path delay for the adder in term to get the excellent delay performance and introduced the high speed 16-bits carry select adder. The design of this carry-select adder is using the Mentor Graphic software.This software was used to implement the transistor level of this design. A simulation for this 16-bits carry select adder design has been performed using a 0.35 μm CMOS technology, and using the EZ Wave waveform viewer to analyze the delay performance. The design approach was minimizing the carry path delay using difference multiplexer. Non-modified design used the basic multiplexer as the selector of the carry, while the modified design was using the transmission gate multiplexer. The simulation results shows that the modified adder design was achieve the better speed. Waveform representations of the design were developed, and the comparable results of the delay of both design are also given. The explanations about both design and how the modified design was improved in term of the delay performance, is also discussed. 2008-07-02T06:29:52Z 2008-07-02T06:29:52Z 2007-03 Learning Object http://hdl.handle.net/123456789/1361 en Universiti Malaysia Perlis School of Microelectronic Engineering
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Metal oxide semiconductors, Complementary
Mentor Graphic software
Carry select adder (CSeA)
CMOS transistors
Computer arithmetic and logic units
Data transmission systems
High speed adder
spellingShingle Metal oxide semiconductors, Complementary
Mentor Graphic software
Carry select adder (CSeA)
CMOS transistors
Computer arithmetic and logic units
Data transmission systems
High speed adder
Nur Syuhada Muhammad Khariri
16-Bits High Speed Carry Select Adder
description Access is limited to UniMAP community.
author2 Norina Idris (Advisor)
author_facet Norina Idris (Advisor)
Nur Syuhada Muhammad Khariri
format Learning Object
author Nur Syuhada Muhammad Khariri
author_sort Nur Syuhada Muhammad Khariri
title 16-Bits High Speed Carry Select Adder
title_short 16-Bits High Speed Carry Select Adder
title_full 16-Bits High Speed Carry Select Adder
title_fullStr 16-Bits High Speed Carry Select Adder
title_full_unstemmed 16-Bits High Speed Carry Select Adder
title_sort 16-bits high speed carry select adder
publisher Universiti Malaysia Perlis
publishDate 2008
url http://dspace.unimap.edu.my/xmlui/handle/123456789/1361
_version_ 1643787265627914240
score 13.214268