Comparison of Speed on 5 Adder Architectures

• Main Author: Norina Mohd Yusoff
• Other Authors: Norina Idris (Advisor)
• Format: Learning Object
• Language: English
• Published: Universiti Malaysia Perlis 2008
• Subjects: Adder architectures; Circuits; Metal oxide semiconductors, Complementary; Carry select adder (CSeA); Quartus II software; Speed performance; Carry look-ahead adder (CLA)
• Online Access: http://dspace.unimap.edu.my/xmlui/handle/123456789/1354

Adders are some of the most critical data path circuits in CPU to perform data processing. The faster the adder, the better it performs data processing. The project presents a novel of comparison analysis on speed of five Complementary metal–oxide– semiconductor (CMOS) adder architectures. The aim of the project is to rank those adders based on the speed performance. The five representative adder architectures used are carry select adder (CSeA), carry look-ahead adder (CLA), ripple carry adder (RCA), carry skip adder (CSkA) and carry save adder (CSvA). The previous work has only reported the speed performance of RCA, CSeA and CLA [2]. The operand length for each adder is 16-bits. The project is simulated and carried out using the Quartus II to present the speed performance of the adder architectures and the implementation Altera UP2 board to verification the design. Based on the comparison of the speed performance, the most high-speed adder is identified. The result shows that the most high-speed adder with the speed of 40MHz on EPF10K70RC240-4 is the carry skip adder architecture, followed by CLA (31.45 MHz), CSeA (24.21 MHz), CSvA (17.73 MHz) and RCA (16.98 MHz).