The Classification of Wafer Defects: A Support Vector Machine with Different DenseNet Transfer Learning Models Evaluation

Wafer defect detection is a non-trivial issue in the semiconductor industry. Conventional means of defect detection is often labor-intensive based that is prone to error owing to a myriad of issue. Hence, there is push toward automatic defect detection in the industry. This work shall investigate th...

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Main Authors: Ismail, Mohd Khairuddin, Lim, Shi Xuen, Mohd Azraai, Mohd Razman, Jessnor Arif, Mat Jizat, Yuen, Edmund, Jiang, Haochuan, Yap, Eng Hwa, Anwar, P. P. Abdul Majeed
Format: Conference or Workshop Item
Language:English
Published: Springer Nature 2023
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Online Access:http://umpir.ump.edu.my/id/eprint/37269/1/The%20Classification%20of%20Wafer%20Defects%20A%20Support%20Vector%20Machine%20with%20Different%20DenseNet%20Transfer%20Learning%20Models%20Evaluation%20%281%29.pdf
http://umpir.ump.edu.my/id/eprint/37269/
https://doi.org/10.1007/978-3-031-26889-2_27
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Summary:Wafer defect detection is a non-trivial issue in the semiconductor industry. Conventional means of defect detection is often labor-intensive based that is prone to error owing to a myriad of issue. Hence, there is push toward automatic defect detection in the industry. This work shall investigate the efficacy of a transfer learning pipeline that consists of different pre-trained DenseNet convolutional neural network models in which its fully connected layer is swapped with different support vector machine (SVM) models in classifying the defect state of a wafer whether it passes or fail. The optimal hyperparameters are identified via the grid search technique. It was shown from the present investigation that the features extracted via the DenseNet121 transfer learning model with a linear-based SVM model with a C and gamma parameter of 0.01, respectively, could yield a validation and test classification accuracy of 93% and 86%, respectively on a stratified 60:20:20 data split ratio. The result from the present study demonstrates that the proposed pipeline is able to classify the defect level of the wafer well.