Development of asynchronous serial data comparator using fpga

• Main Author: Arwena, Abdullah
• Format: Undergraduates Project Papers
• Language: English
• Published: 2006
• Subjects: TA Engineering (General). Civil engineering (General)
• Online Access: http://umpir.ump.edu.my/id/eprint/351/1/Development%20of%20asynchronous%20serial%20data%20comparator%20using%20FPGA.pdf; http://umpir.ump.edu.my/id/eprint/351/

The wide and simpler usage of FPGA in everyday applications opened the door for students to study its usage and applications in electronics. There are many applications that can be implemented in FPGA and one of them is in developing asynchronous serial data comparator using FPGA. This project is involved the design, implementation and test of a digital logic system by the application of the FPGA as the programmable gate logics where will be implemented as the program to communicate with the MAX233 and the PC for serial data comparator transferring and to control in storing and accessing the data in the application of comparison ID code and ID number. The program developed is processed in digital form that is the data bit generated is in digital. It will recognizes the 8 bits and it represent as the data bits that determine the ID number and compare the code. Each bit of the ID number will stored in the different flip-flop of 8 shift register. If each flip-flop output matches the ID number, the circuitry produces a high output. This circuitry then will burn in to the ALTERA and will communicate with the data that transmit.